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authorCho KyongHo <pullip.cho@samsung.com>2012-12-26 01:54:02 (GMT)
committerJoerg Roedel <joro@8bytes.org>2013-01-11 15:26:12 (GMT)
commit25e9d28d927d2e1731df53f60cde53d75bcb7c36 (patch)
tree02b91a0cb2155885d7ee74e849094b37e23c9836 /arch/arm/mach-exynos/clock-exynos4212.c
parent9931faca02c604c22335f5a935a501bb2ace6e20 (diff)
downloadlinux-fsl-qoriq-25e9d28d927d2e1731df53f60cde53d75bcb7c36.tar.xz
ARM: EXYNOS: remove system mmu initialization from exynos tree
This removes System MMU initialization from arch/arm/mach-exynos/ to move them to DT and the exynos-iommu driver except gating clock definitions. Signed-off-by: KyongHo Cho <pullip.cho@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
Diffstat (limited to 'arch/arm/mach-exynos/clock-exynos4212.c')
-rw-r--r--arch/arm/mach-exynos/clock-exynos4212.c23
1 files changed, 16 insertions, 7 deletions
diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c
index 8fba0b5..529476f 100644
--- a/arch/arm/mach-exynos/clock-exynos4212.c
+++ b/arch/arm/mach-exynos/clock-exynos4212.c
@@ -26,7 +26,6 @@
#include <mach/hardware.h>
#include <mach/map.h>
#include <mach/regs-clock.h>
-#include <mach/sysmmu.h>
#include "common.h"
#include "clock-exynos4.h"
@@ -111,21 +110,31 @@ static struct clksrc_clk clksrcs[] = {
static struct clk init_clocks_off[] = {
{
- .name = SYSMMU_CLOCK_NAME,
- .devname = SYSMMU_CLOCK_DEVNAME(2d, 14),
+ .name = "sysmmu",
+ .devname = "exynos-sysmmu.9",
.enable = exynos4_clk_ip_dmc_ctrl,
.ctrlbit = (1 << 24),
}, {
- .name = SYSMMU_CLOCK_NAME,
- .devname = SYSMMU_CLOCK_DEVNAME(isp, 9),
+ .name = "sysmmu",
+ .devname = "exynos-sysmmu.12",
.enable = exynos4212_clk_ip_isp0_ctrl,
.ctrlbit = (7 << 8),
}, {
- .name = SYSMMU_CLOCK_NAME2,
- .devname = SYSMMU_CLOCK_DEVNAME(isp, 9),
+ .name = "sysmmu",
+ .devname = "exynos-sysmmu.13",
.enable = exynos4212_clk_ip_isp1_ctrl,
.ctrlbit = (1 << 4),
}, {
+ .name = "sysmmu",
+ .devname = "exynos-sysmmu.14",
+ .enable = exynos4212_clk_ip_isp0_ctrl,
+ .ctrlbit = (1 << 11),
+ }, {
+ .name = "sysmmu",
+ .devname = "exynos-sysmmu.15",
+ .enable = exynos4212_clk_ip_isp0_ctrl,
+ .ctrlbit = (1 << 12),
+ }, {
.name = "flite",
.devname = "exynos-fimc-lite.0",
.enable = exynos4212_clk_ip_isp0_ctrl,