diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-02 01:19:05 (GMT) |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-02 01:19:05 (GMT) |
commit | 61464c8357c8f6b780e4c44f5c79471799c51ca7 (patch) | |
tree | 4509cf075403965528f380f2f825c46908fb7d4e /arch/arm/mach-iop13xx | |
parent | 47061eda2584b9e4516d1e3a9713406a3a559ac8 (diff) | |
parent | 9cf1c871526cf6bfec2a653e1e068ee72592542c (diff) | |
download | linux-fsl-qoriq-61464c8357c8f6b780e4c44f5c79471799c51ca7.tar.xz |
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc general cleanups from Olof Johansson:
"This is a large branch that contains a handful of different cleanups:
- Fixing up the I/O space remapping on PCI on ARM. This is a series
from Rob Herring that restructures how all pci devices allocate I/O
space, and it's part of the work to allow multiplatform kernels.
- A number of cleanup series for OMAP, moving and removing some
headers, sparse irq rework and in general preparation for
multiplatform.
- Final removal of all non-DT boards for Tegra, it is now
device-tree-only!
- Removal of a stale platform, nxp4008. It's an old mobile chipset
that is no longer in use, and was very likely never really used
with a mainline kernel. We have not been able to find anyone
interested in keeping it around in the kernel.
- Removal of the legacy dmaengine driver on tegra
+ A handful of other things that I haven't described above."
Fix up some conflicts with the staging tree (and because nxp4008 was
removed)
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (184 commits)
ARM: OMAP2+: serial: Change MAX_HSUART_PORTS to 6
ARM: OMAP4: twl-common: Support for additional devices on i2c1 bus
ARM: mmp: using for_each_set_bit to simplify the code
ARM: tegra: harmony: fix ldo7 regulator-name
ARM: OMAP2+: Make omap4-keypad.h local
ARM: OMAP2+: Make l4_3xxx.h local
ARM: OMAP2+: Make l4_2xxx.h local
ARM: OMAP2+: Make l3_3xxx.h local
ARM: OMAP2+: Make l3_2xxx.h local
ARM: OMAP1: Move irda.h from plat to mach
ARM: OMAP2+: Make hdq1w.h local
ARM: OMAP2+: Make gpmc-smsc911x.h local
ARM: OMAP2+: Make gpmc-smc91x.h local
ARM: OMAP1: Move flash.h from plat to mach
ARM: OMAP2+: Make debug-devices.h local
ARM: OMAP1: Move board-voiceblue.h from plat to mach
ARM: OMAP1: Move board-sx1.h from plat to mach
ARM: OMAP2+: Make omap-wakeupgen.h local
ARM: OMAP2+: Make omap-secure.h local
ARM: OMAP2+: Make ctrl_module_wkup_44xx.h local
...
Diffstat (limited to 'arch/arm/mach-iop13xx')
-rw-r--r-- | arch/arm/mach-iop13xx/include/mach/io.h | 28 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/include/mach/iop13xx.h | 48 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/include/mach/memory.h | 14 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/io.c | 35 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/pci.c | 53 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/pci.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/setup.c | 20 |
7 files changed, 50 insertions, 152 deletions
diff --git a/arch/arm/mach-iop13xx/include/mach/io.h b/arch/arm/mach-iop13xx/include/mach/io.h deleted file mode 100644 index f131885..0000000 --- a/arch/arm/mach-iop13xx/include/mach/io.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * iop13xx custom ioremap implementation - * Copyright (c) 2005-2006, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple - * Place - Suite 330, Boston, MA 02111-1307 USA. - * - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __iop13xx_io(a) - -extern void __iomem * __iop13xx_io(unsigned long io_addr); - -#endif diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h index e190dcd..7480f58 100644 --- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h +++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h @@ -69,21 +69,11 @@ extern unsigned long get_iop_tick_rate(void); * 0x8000.0000 + 928M 0x2.8000.0000 (ioremap) PCIE outbound memory window * * IO MAP - * 0x1000 + 64K 0x0.fffb.1000 0xfec6.1000 PCIX outbound i/o window - * 0x1000 + 64K 0x0.fffd.1000 0xfed7.1000 PCIE outbound i/o window + * 0x00000 + 64K 0x0.fffb.0000 0xfee0.0000 PCIX outbound i/o window + * 0x10000 + 64K 0x0.fffd.0000 0xfee1.0000 PCIE outbound i/o window */ -#define IOP13XX_PCIX_IO_WINDOW_SIZE 0x10000UL #define IOP13XX_PCIX_LOWER_IO_PA 0xfffb0000UL -#define IOP13XX_PCIX_LOWER_IO_VA 0xfec60000UL #define IOP13XX_PCIX_LOWER_IO_BA 0x0UL /* OIOTVR */ -#define IOP13XX_PCIX_IO_BUS_OFFSET 0x1000UL -#define IOP13XX_PCIX_UPPER_IO_PA (IOP13XX_PCIX_LOWER_IO_PA +\ - IOP13XX_PCIX_IO_WINDOW_SIZE - 1) -#define IOP13XX_PCIX_UPPER_IO_VA (IOP13XX_PCIX_LOWER_IO_VA +\ - IOP13XX_PCIX_IO_WINDOW_SIZE - 1) -#define IOP13XX_PCIX_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ - (IOP13XX_PCIX_LOWER_IO_PA\ - - IOP13XX_PCIX_LOWER_IO_VA)) #define IOP13XX_PCIX_MEM_PHYS_OFFSET 0x100000000ULL #define IOP13XX_PCIX_MEM_WINDOW_SIZE 0x3a000000UL @@ -103,20 +93,8 @@ extern unsigned long get_iop_tick_rate(void); IOP13XX_PCIX_LOWER_MEM_BA) /* PCI-E ranges */ -#define IOP13XX_PCIE_IO_WINDOW_SIZE 0x10000UL #define IOP13XX_PCIE_LOWER_IO_PA 0xfffd0000UL -#define IOP13XX_PCIE_LOWER_IO_VA 0xfed70000UL -#define IOP13XX_PCIE_LOWER_IO_BA 0x0UL /* OIOTVR */ -#define IOP13XX_PCIE_IO_BUS_OFFSET 0x1000UL -#define IOP13XX_PCIE_UPPER_IO_PA (IOP13XX_PCIE_LOWER_IO_PA +\ - IOP13XX_PCIE_IO_WINDOW_SIZE - 1) -#define IOP13XX_PCIE_UPPER_IO_VA (IOP13XX_PCIE_LOWER_IO_VA +\ - IOP13XX_PCIE_IO_WINDOW_SIZE - 1) -#define IOP13XX_PCIE_UPPER_IO_BA (IOP13XX_PCIE_LOWER_IO_BA +\ - IOP13XX_PCIE_IO_WINDOW_SIZE - 1) -#define IOP13XX_PCIE_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ - (IOP13XX_PCIE_LOWER_IO_PA\ - - IOP13XX_PCIE_LOWER_IO_VA)) +#define IOP13XX_PCIE_LOWER_IO_BA 0x10000UL /* OIOTVR */ #define IOP13XX_PCIE_MEM_PHYS_OFFSET 0x200000000ULL #define IOP13XX_PCIE_MEM_WINDOW_SIZE 0x3a000000UL @@ -148,18 +126,16 @@ extern unsigned long get_iop_tick_rate(void); * IOP13XX chipset registers */ #define IOP13XX_PMMR_PHYS_MEM_BASE 0xffd80000UL /* PMMR phys. address */ -#define IOP13XX_PMMR_VIRT_MEM_BASE 0xfee80000UL /* PMMR phys. address */ +#define IOP13XX_PMMR_VIRT_MEM_BASE (void __iomem *)(0xfee80000UL) /* PMMR phys. address */ #define IOP13XX_PMMR_MEM_WINDOW_SIZE 0x80000 #define IOP13XX_PMMR_UPPER_MEM_VA (IOP13XX_PMMR_VIRT_MEM_BASE +\ IOP13XX_PMMR_MEM_WINDOW_SIZE - 1) #define IOP13XX_PMMR_UPPER_MEM_PA (IOP13XX_PMMR_PHYS_MEM_BASE +\ IOP13XX_PMMR_MEM_WINDOW_SIZE - 1) -#define IOP13XX_PMMR_VIRT_TO_PHYS(addr) (u32) ((u32) addr +\ - (IOP13XX_PMMR_PHYS_MEM_BASE\ - - IOP13XX_PMMR_VIRT_MEM_BASE)) -#define IOP13XX_PMMR_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ - (IOP13XX_PMMR_PHYS_MEM_BASE\ - - IOP13XX_PMMR_VIRT_MEM_BASE)) +#define IOP13XX_PMMR_VIRT_TO_PHYS(addr) (((addr) - IOP13XX_PMMR_VIRT_MEM_BASE)\ + + IOP13XX_PMMR_PHYS_MEM_BASE) +#define IOP13XX_PMMR_PHYS_TO_VIRT(addr) (((addr) - IOP13XX_PMMR_PHYS_MEM_BASE)\ + + IOP13XX_PMMR_VIRT_MEM_BASE) #define IOP13XX_REG_ADDR32(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg)) #define IOP13XX_REG_ADDR16(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg)) #define IOP13XX_REG_ADDR8(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg)) @@ -169,10 +145,10 @@ extern unsigned long get_iop_tick_rate(void); #define IOP13XX_PMMR_SIZE 0x00080000 /*=================== Defines for Platform Devices =====================*/ -#define IOP13XX_UART0_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002300) -#define IOP13XX_UART1_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002340) -#define IOP13XX_UART0_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002300) -#define IOP13XX_UART1_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002340) +#define IOP13XX_UART0_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE + 0x00002300) +#define IOP13XX_UART1_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE + 0x00002340) +#define IOP13XX_UART0_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE + 0x00002300) +#define IOP13XX_UART1_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE + 0x00002340) #define IOP13XX_I2C0_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002500) #define IOP13XX_I2C1_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002520) diff --git a/arch/arm/mach-iop13xx/include/mach/memory.h b/arch/arm/mach-iop13xx/include/mach/memory.h index 1afa99e..7c032d0 100644 --- a/arch/arm/mach-iop13xx/include/mach/memory.h +++ b/arch/arm/mach-iop13xx/include/mach/memory.h @@ -16,12 +16,12 @@ #define IOP13XX_PMMR_P_START (IOP13XX_PMMR_PHYS_MEM_BASE) #define IOP13XX_PMMR_P_END (IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_SIZE) -static inline dma_addr_t __virt_to_lbus(unsigned long x) +static inline dma_addr_t __virt_to_lbus(void __iomem *x) { return x + IOP13XX_PMMR_PHYS_MEM_BASE - IOP13XX_PMMR_VIRT_MEM_BASE; } -static inline unsigned long __lbus_to_virt(dma_addr_t x) +static inline void __iomem *__lbus_to_virt(dma_addr_t x) { return x + IOP13XX_PMMR_VIRT_MEM_BASE - IOP13XX_PMMR_PHYS_MEM_BASE; } @@ -38,23 +38,23 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x) #define __arch_dma_to_virt(dev, addr) \ ({ \ - unsigned long __virt; \ + void * __virt; \ dma_addr_t __dma = addr; \ if (is_lbus_device(dev) && __is_lbus_dma(__dma)) \ __virt = __lbus_to_virt(__dma); \ else \ - __virt = __phys_to_virt(__dma); \ - (void *)__virt; \ + __virt = (void *)__phys_to_virt(__dma); \ + __virt; \ }) #define __arch_virt_to_dma(dev, addr) \ ({ \ - unsigned long __virt = (unsigned long)addr; \ + void * __virt = addr; \ dma_addr_t __dma; \ if (is_lbus_device(dev) && __is_lbus_virt(__virt)) \ __dma = __virt_to_lbus(__virt); \ else \ - __dma = __virt_to_phys(__virt); \ + __dma = __virt_to_phys((unsigned long)__virt); \ __dma; \ }) diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c index 3c36419..183dc8b 100644 --- a/arch/arm/mach-iop13xx/io.c +++ b/arch/arm/mach-iop13xx/io.c @@ -23,25 +23,6 @@ #include "pci.h" -void * __iomem __iop13xx_io(unsigned long io_addr) -{ - void __iomem * io_virt; - - switch (io_addr) { - case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA: - io_virt = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(io_addr); - break; - case IOP13XX_PCIX_LOWER_IO_PA ... IOP13XX_PCIX_UPPER_IO_PA: - io_virt = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(io_addr); - break; - default: - BUG(); - } - - return io_virt; -} -EXPORT_SYMBOL(__iop13xx_io); - static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie, size_t size, unsigned int mtype, void *caller) { @@ -52,14 +33,14 @@ static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie, if (unlikely(!iop13xx_atux_mem_base)) retval = NULL; else - retval = (void *)(iop13xx_atux_mem_base + + retval = (iop13xx_atux_mem_base + (cookie - IOP13XX_PCIX_LOWER_MEM_RA)); break; case IOP13XX_PCIE_LOWER_MEM_RA ... IOP13XX_PCIE_UPPER_MEM_RA: if (unlikely(!iop13xx_atue_mem_base)) retval = NULL; else - retval = (void *)(iop13xx_atue_mem_base + + retval = (iop13xx_atue_mem_base + (cookie - IOP13XX_PCIE_LOWER_MEM_RA)); break; case IOP13XX_PBI_LOWER_MEM_RA ... IOP13XX_PBI_UPPER_MEM_RA: @@ -67,14 +48,8 @@ static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie, (cookie - IOP13XX_PBI_LOWER_MEM_RA), size, mtype, __builtin_return_address(0)); break; - case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA: - retval = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(cookie); - break; - case IOP13XX_PCIX_LOWER_IO_PA ... IOP13XX_PCIX_UPPER_IO_PA: - retval = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(cookie); - break; case IOP13XX_PMMR_PHYS_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_PA: - retval = (void *) IOP13XX_PMMR_PHYS_TO_VIRT(cookie); + retval = IOP13XX_PMMR_PHYS_TO_VIRT(cookie); break; default: retval = __arm_ioremap_caller(cookie, size, mtype, @@ -99,9 +74,7 @@ static void __iop13xx_iounmap(volatile void __iomem *addr) goto skip; switch ((u32) addr) { - case IOP13XX_PCIE_LOWER_IO_VA ... IOP13XX_PCIE_UPPER_IO_VA: - case IOP13XX_PCIX_LOWER_IO_VA ... IOP13XX_PCIX_UPPER_IO_VA: - case IOP13XX_PMMR_VIRT_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_VA: + case (u32)IOP13XX_PMMR_VIRT_MEM_BASE ... (u32)IOP13XX_PMMR_UPPER_MEM_VA: goto skip; } __iounmap(addr); diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index 861cb12..9082b84 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c @@ -36,8 +36,8 @@ u32 iop13xx_atux_pmmr_offset; /* This offset can change based on strapping */ u32 iop13xx_atue_pmmr_offset; /* This offset can change based on strapping */ static struct pci_bus *pci_bus_atux = 0; static struct pci_bus *pci_bus_atue = 0; -u32 iop13xx_atue_mem_base; -u32 iop13xx_atux_mem_base; +void __iomem *iop13xx_atue_mem_base; +void __iomem *iop13xx_atux_mem_base; size_t iop13xx_atue_mem_size; size_t iop13xx_atux_mem_size; @@ -88,8 +88,7 @@ void iop13xx_map_pci_memory(void) } if (end) { - iop13xx_atux_mem_base = - (u32) __arm_ioremap_pfn( + iop13xx_atux_mem_base = __arm_ioremap_pfn( __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA) , 0, iop13xx_atux_mem_size, MT_DEVICE); if (!iop13xx_atux_mem_base) { @@ -99,7 +98,7 @@ void iop13xx_map_pci_memory(void) } } else iop13xx_atux_mem_size = 0; - PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n", + PRINTK("%s: atu: %d bus_size: %d mem_base: %p\n", __func__, atu, iop13xx_atux_mem_size, iop13xx_atux_mem_base); break; @@ -114,8 +113,7 @@ void iop13xx_map_pci_memory(void) } if (end) { - iop13xx_atue_mem_base = - (u32) __arm_ioremap_pfn( + iop13xx_atue_mem_base = __arm_ioremap_pfn( __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA) , 0, iop13xx_atue_mem_size, MT_DEVICE); if (!iop13xx_atue_mem_base) { @@ -125,13 +123,13 @@ void iop13xx_map_pci_memory(void) } } else iop13xx_atue_mem_size = 0; - PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n", + PRINTK("%s: atu: %d bus_size: %d mem_base: %p\n", __func__, atu, iop13xx_atue_mem_size, iop13xx_atue_mem_base); break; } - printk("%s: Initialized (%uM @ resource/virtual: %08lx/%08x)\n", + printk("%s: Initialized (%uM @ resource/virtual: %08lx/%p)\n", atu ? "ATUE" : "ATUX", (atu ? iop13xx_atue_mem_size : iop13xx_atux_mem_size) / SZ_1M, @@ -970,7 +968,6 @@ void __init iop13xx_pci_init(void) __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, IOP13XX_XBG_BECSR); /* Setup the Min Address for PCI memory... */ - pcibios_min_io = 0; pcibios_min_mem = IOP13XX_PCIX_LOWER_MEM_BA; /* if Linux is given control of an ATU @@ -1003,7 +1000,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) if (nr > 1) return 0; - res = kcalloc(2, sizeof(struct resource), GFP_KERNEL); + res = kzalloc(sizeof(struct resource), GFP_KERNEL); if (!res) panic("PCI: unable to alloc resources"); @@ -1042,17 +1039,13 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) << IOP13XX_ATUX_PCIXSR_FUNC_NUM; __raw_writel(pcixsr, IOP13XX_ATUX_PCIXSR); - res[0].start = IOP13XX_PCIX_LOWER_IO_PA + IOP13XX_PCIX_IO_BUS_OFFSET; - res[0].end = IOP13XX_PCIX_UPPER_IO_PA; - res[0].name = "IQ81340 ATUX PCI I/O Space"; - res[0].flags = IORESOURCE_IO; + pci_ioremap_io(0, IOP13XX_PCIX_LOWER_IO_PA); - res[1].start = IOP13XX_PCIX_LOWER_MEM_RA; - res[1].end = IOP13XX_PCIX_UPPER_MEM_RA; - res[1].name = "IQ81340 ATUX PCI Memory Space"; - res[1].flags = IORESOURCE_MEM; + res->start = IOP13XX_PCIX_LOWER_MEM_RA; + res->end = IOP13XX_PCIX_UPPER_MEM_RA; + res->name = "IQ81340 ATUX PCI Memory Space"; + res->flags = IORESOURCE_MEM; sys->mem_offset = IOP13XX_PCIX_MEM_OFFSET; - sys->io_offset = IOP13XX_PCIX_LOWER_IO_PA; break; case IOP13XX_INIT_ATU_ATUE: /* Note: the function number field in the PCSR is ro */ @@ -1063,17 +1056,13 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) __raw_writel(pcsr, IOP13XX_ATUE_PCSR); - res[0].start = IOP13XX_PCIE_LOWER_IO_PA + IOP13XX_PCIE_IO_BUS_OFFSET; - res[0].end = IOP13XX_PCIE_UPPER_IO_PA; - res[0].name = "IQ81340 ATUE PCI I/O Space"; - res[0].flags = IORESOURCE_IO; + pci_ioremap_io(SZ_64K, IOP13XX_PCIE_LOWER_IO_PA); - res[1].start = IOP13XX_PCIE_LOWER_MEM_RA; - res[1].end = IOP13XX_PCIE_UPPER_MEM_RA; - res[1].name = "IQ81340 ATUE PCI Memory Space"; - res[1].flags = IORESOURCE_MEM; + res->start = IOP13XX_PCIE_LOWER_MEM_RA; + res->end = IOP13XX_PCIE_UPPER_MEM_RA; + res->name = "IQ81340 ATUE PCI Memory Space"; + res->flags = IORESOURCE_MEM; sys->mem_offset = IOP13XX_PCIE_MEM_OFFSET; - sys->io_offset = IOP13XX_PCIE_LOWER_IO_PA; sys->map_irq = iop13xx_pcie_map_irq; break; default: @@ -1081,11 +1070,9 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) return 0; } - request_resource(&ioport_resource, &res[0]); - request_resource(&iomem_resource, &res[1]); + request_resource(&iomem_resource, res); - pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); - pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); + pci_add_resource_offset(&sys->resources, res, sys->mem_offset); return 1; } diff --git a/arch/arm/mach-iop13xx/pci.h b/arch/arm/mach-iop13xx/pci.h index c70cf5b..d45a80b 100644 --- a/arch/arm/mach-iop13xx/pci.h +++ b/arch/arm/mach-iop13xx/pci.h @@ -1,6 +1,6 @@ #include <linux/types.h> -extern u32 iop13xx_atue_mem_base; -extern u32 iop13xx_atux_mem_base; +extern void __iomem *iop13xx_atue_mem_base; +extern void __iomem *iop13xx_atux_mem_base; extern size_t iop13xx_atue_mem_size; extern size_t iop13xx_atux_mem_size; diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c index daabb1f..3181f61 100644 --- a/arch/arm/mach-iop13xx/setup.c +++ b/arch/arm/mach-iop13xx/setup.c @@ -36,20 +36,10 @@ */ static struct map_desc iop13xx_std_desc[] __initdata = { { /* mem mapped registers */ - .virtual = IOP13XX_PMMR_VIRT_MEM_BASE, + .virtual = (unsigned long)IOP13XX_PMMR_VIRT_MEM_BASE, .pfn = __phys_to_pfn(IOP13XX_PMMR_PHYS_MEM_BASE), .length = IOP13XX_PMMR_SIZE, .type = MT_DEVICE, - }, { /* PCIE IO space */ - .virtual = IOP13XX_PCIE_LOWER_IO_VA, - .pfn = __phys_to_pfn(IOP13XX_PCIE_LOWER_IO_PA), - .length = IOP13XX_PCIX_IO_WINDOW_SIZE, - .type = MT_DEVICE, - }, { /* PCIX IO space */ - .virtual = IOP13XX_PCIX_LOWER_IO_VA, - .pfn = __phys_to_pfn(IOP13XX_PCIX_LOWER_IO_PA), - .length = IOP13XX_PCIX_IO_WINDOW_SIZE, - .type = MT_DEVICE, }, }; @@ -81,8 +71,8 @@ static struct resource iop13xx_uart1_resources[] = { static struct plat_serial8250_port iop13xx_uart0_data[] = { { - .membase = (char*)(IOP13XX_UART0_VIRT), - .mapbase = (IOP13XX_UART0_PHYS), + .membase = IOP13XX_UART0_VIRT, + .mapbase = IOP13XX_UART0_PHYS, .irq = IRQ_IOP13XX_UART0, .uartclk = IOP13XX_UART_XTAL, .regshift = 2, @@ -94,8 +84,8 @@ static struct plat_serial8250_port iop13xx_uart0_data[] = { static struct plat_serial8250_port iop13xx_uart1_data[] = { { - .membase = (char*)(IOP13XX_UART1_VIRT), - .mapbase = (IOP13XX_UART1_PHYS), + .membase = IOP13XX_UART1_VIRT, + .mapbase = IOP13XX_UART1_PHYS, .irq = IRQ_IOP13XX_UART1, .uartclk = IOP13XX_UART_XTAL, .regshift = 2, |