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| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-18 17:07:43 (GMT) |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-18 17:07:43 (GMT) |
| commit | d5381e42f64ca19f05c5799ffae5708acb6ed411 (patch) | |
| tree | 8b5e757a9847047102c475c6c583afc191d02e5b /arch/arm/mach-lpc32xx/pm.c | |
| parent | f030d60b30855e18ac5bf080fa9e576147623d18 (diff) | |
| parent | b3c27b51db9112d03864fdef44fa611dd69c1425 (diff) | |
| download | linux-fsl-qoriq-d5381e42f64ca19f05c5799ffae5708acb6ed411.tar.xz | |
ASoC: Merge branch 'for-2.6.39' into for-2.6.40
Fix trivial conflict caused by silly spelling fix patch.
Conflicts:
sound/soc/codecs/wm8994.c
Diffstat (limited to 'arch/arm/mach-lpc32xx/pm.c')
| -rw-r--r-- | arch/arm/mach-lpc32xx/pm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-lpc32xx/pm.c b/arch/arm/mach-lpc32xx/pm.c index e76d41b..b9c8059 100644 --- a/arch/arm/mach-lpc32xx/pm.c +++ b/arch/arm/mach-lpc32xx/pm.c @@ -41,7 +41,7 @@ * DRAM clocking and refresh are slightly different for systems with DDR * DRAM or regular SDRAM devices. If SDRAM is used in the system, the * SDRAM will still be accessible in direct-run mode. In DDR based systems, - * a transistion to direct-run mode will stop all DDR accesses (no clocks). + * a transition to direct-run mode will stop all DDR accesses (no clocks). * Because of this, the code to switch power modes and the code to enter * and exit DRAM self-refresh modes must not be executed in DRAM. A small * section of IRAM is used instead for this. |