diff options
| author | Stephen Boyd <sboyd@codeaurora.org> | 2012-09-05 19:28:51 (GMT) |
|---|---|---|
| committer | David Brown <davidb@codeaurora.org> | 2012-09-13 18:14:29 (GMT) |
| commit | 66a8950949c12a2600ff62e78b24f42ef8f6d28e (patch) | |
| tree | c348c8ba6bf082bafaa44e390f3129ce2dd45b4c /arch/arm/mach-msm/board-msm8x60.c | |
| parent | e8ea1ea90bfd90d3047924b77a3f76cf2147ada1 (diff) | |
| download | linux-fsl-qoriq-66a8950949c12a2600ff62e78b24f42ef8f6d28e.tar.xz | |
ARM: msm: Don't touch GIC registers outside of GIC code
The MSM code has some antiquated register writes to set up the
PPIs to be edge triggered. Now that we have the percpu irq
interface we don't need this code so let's remove it and update
the percpu irq user (msm_timer) to set the irq type.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/board-msm8x60.c')
| -rw-r--r-- | arch/arm/mach-msm/board-msm8x60.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index 13ca9bb..9df5c83 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c @@ -67,9 +67,6 @@ static void __init msm8x60_init_irq(void) of_irq_init(msm_dt_gic_match); #endif - /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ - writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); - /* RUMI does not adhere to GIC spec by enabling STIs by default. * Enable/clear is supposed to be RO for STIs, but is RW on RUMI. */ |