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authorPaul Walmsley <paul@pwsan.com>2011-12-16 21:36:58 (GMT)
committerPaul Walmsley <paul@pwsan.com>2011-12-16 21:36:58 (GMT)
commit26c98c561c02f3c08fd6182d16de0c2857d0644c (patch)
tree72a2ea8b6ae05dd35e17420073b3c0f83c024659 /arch/arm/mach-omap2/Makefile
parenteceec00914e3a74b94eea832f9e829c3efcea9bc (diff)
downloadlinux-fsl-qoriq-26c98c561c02f3c08fd6182d16de0c2857d0644c.tar.xz
ARM: OMAP3/4: PRM: add functions to read pending IRQs, PRM barrier
Add PRM functions to test for pending PRM IRQs. This will be used in a subsequent patch to implement the PRM interrupt handler on the MPU. Add PRM functions to ensure that all outstanding writes from the MPU to the PRM IP block have completed before continuing execution. This will be used in a subsequent patch to ensure that all PRM interrupt status bits are cleared in the hardware before exiting the ISR. Normally we would not expose such a low-level function to other code. But the current implementation of the PRM interrupt code, which uses the generic IRQ chip code, doesn't give us a choice. The pending PRM IRQ functions are based on code originally written by Tero Kristo <t-kristo@ti.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com>
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