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authorRajendra Nayak <rnayak@ti.com>2012-05-14 07:20:38 (GMT)
committerPaul Walmsley <paul@pwsan.com>2012-11-13 02:10:19 (GMT)
commitb6827ad5b6a30771dafa2fa8493594e56ca87d5d (patch)
treea21d5ecd94c6203be7c9b5b79d3b742129bc2f0c /arch/arm/mach-omap2/clock2430_data.c
parentd043d87cd33ef0a6bec707077ef88f4c020db4c8 (diff)
downloadlinux-fsl-qoriq-b6827ad5b6a30771dafa2fa8493594e56ca87d5d.tar.xz
ARM: OMAP: clock: Get rid of some clkdm assocations within clks
It's suspected that some of the clockdomain associations with clocks can be removed from the clock data. Drop several of these associations to save diffstat and improve performance. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: removed most of the changes in this patch; modified patch description] Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Mike Turquette <mturquette@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock2430_data.c')
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index b179b6e..b2d2fb3 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -53,14 +53,12 @@ static struct clk func_32k_ck = {
.name = "func_32k_ck",
.ops = &clkops_null,
.rate = 32768,
- .clkdm_name = "wkup_clkdm",
};
static struct clk secure_32k_ck = {
.name = "secure_32k_ck",
.ops = &clkops_null,
.rate = 32768,
- .clkdm_name = "wkup_clkdm",
};
/* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */
@@ -84,7 +82,6 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */
.name = "alt_ck",
.ops = &clkops_null,
.rate = 54000000,
- .clkdm_name = "wkup_clkdm",
};
/* Optional external clock input for McBSP CLKS */
@@ -178,7 +175,6 @@ static struct clk func_54m_ck = {
.name = "func_54m_ck",
.ops = &clkops_null,
.parent = &apll54_ck, /* can also be alt_clk */
- .clkdm_name = "wkup_clkdm",
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
.clksel_mask = OMAP24XX_54M_SOURCE_MASK,
@@ -215,7 +211,6 @@ static struct clk func_96m_ck = {
.name = "func_96m_ck",
.ops = &clkops_null,
.parent = &apll96_ck,
- .clkdm_name = "wkup_clkdm",
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
.clksel_mask = OMAP2430_96M_SOURCE_MASK,
@@ -260,7 +255,6 @@ static struct clk func_12m_ck = {
.ops = &clkops_null,
.parent = &func_48m_ck,
.fixed_div = 4,
- .clkdm_name = "wkup_clkdm",
.recalc = &omap_fixed_divisor_recalc,
};
@@ -342,7 +336,6 @@ static struct clk sys_clkout = {
.name = "sys_clkout",
.ops = &clkops_null,
.parent = &sys_clkout_src,
- .clkdm_name = "wkup_clkdm",
.clksel_reg = OMAP2430_PRCM_CLKOUT_CTRL,
.clksel_mask = OMAP24XX_CLKOUT_DIV_MASK,
.clksel = sys_clkout_clksel,
@@ -387,7 +380,6 @@ static struct clk mpu_ck = { /* Control cpu */
.name = "mpu_ck",
.ops = &clkops_null,
.parent = &core_ck,
- .clkdm_name = "mpu_clkdm",
.init = &omap2_init_clksel_parent,
.clksel_reg = OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL),
.clksel_mask = OMAP24XX_CLKSEL_MPU_MASK,
@@ -485,7 +477,6 @@ static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */
.name = "core_l3_ck",
.ops = &clkops_null,
.parent = &core_ck,
- .clkdm_name = "core_l3_clkdm",
.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
.clksel_mask = OMAP24XX_CLKSEL_L3_MASK,
.clksel = core_l3_clksel,
@@ -541,7 +532,6 @@ static struct clk l4_ck = { /* used both as an ick and fck */
.name = "l4_ck",
.ops = &clkops_null,
.parent = &core_l3_ck,
- .clkdm_name = "core_l4_clkdm",
.clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
.clksel_mask = OMAP24XX_CLKSEL_L4_MASK,
.clksel = l4_clksel,