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authorSukumar Ghorai <s-ghorai@ti.com>2010-09-15 14:49:23 (GMT)
committerTony Lindgren <tony@atomide.com>2010-09-27 17:15:26 (GMT)
commit3a63833ec3002816a759a49ebda4e229c089114e (patch)
tree0ba266febb87cd181ed414b2f3ee103c37470e88 /arch/arm/mach-omap2/hsmmc.c
parent7193559af4243279790fd8dbfef82f8536d9c514 (diff)
downloadlinux-fsl-qoriq-3a63833ec3002816a759a49ebda4e229c089114e.tar.xz
omap: mmc: extended to pass host capabilities from board file
wires variable is renamed, extended and this single variable to be used to pass the platform capabilities, e.g DDR mode. Also removed the hardcoded value was using as bus-width. Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/hsmmc.c')
-rw-r--r--arch/arm/mach-omap2/hsmmc.c16
1 files changed, 10 insertions, 6 deletions
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index c8f647b..87ce6ff 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -258,7 +258,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
"mmc%islot%i", c->mmc, 1);
mmc->slots[0].name = hc->name;
mmc->nr_slots = 1;
- mmc->slots[0].wires = c->wires;
+ mmc->slots[0].caps = c->caps;
mmc->slots[0].internal_clock = !c->ext_clock;
mmc->dma_mask = 0xffffffff;
@@ -316,16 +316,20 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
}
/* Omap3630 HSMMC1 supports only 4-bit */
- if (cpu_is_omap3630() && c->wires > 4) {
- c->wires = 4;
- mmc->slots[0].wires = c->wires;
+ if (cpu_is_omap3630() &&
+ (c->caps & MMC_CAP_8_BIT_DATA)) {
+ c->caps &= ~MMC_CAP_8_BIT_DATA;
+ c->caps |= MMC_CAP_4_BIT_DATA;
+ mmc->slots[0].caps = c->caps;
}
break;
case 2:
if (c->ext_clock)
c->transceiver = 1;
- if (c->transceiver && c->wires > 4)
- c->wires = 4;
+ if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) {
+ c->caps &= ~MMC_CAP_8_BIT_DATA;
+ c->caps |= MMC_CAP_4_BIT_DATA;
+ }
/* FALLTHROUGH */
case 3:
if (mmc->slots[0].features & HSMMC_HAS_PBIAS) {