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| author | Omar Ramirez Luna <omar.luna@linaro.org> | 2012-06-18 22:18:09 (GMT) |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2012-06-18 22:18:09 (GMT) |
| commit | 90f1380ef6436a3f5425f942ea0b3f78e1cca142 (patch) | |
| tree | fb804c835caf421b765c1c1add1a90fd6e4b7543 /arch/arm/mach-omap2/include | |
| parent | 485802a6c524e62b5924849dd727ddbb1497cc71 (diff) | |
| download | linux-fsl-qoriq-90f1380ef6436a3f5425f942ea0b3f78e1cca142.tar.xz | |
ARM: OMAP2+: control: new APIs to configure boot address and mode
SCM contains boot addr and boot mode registers to control
other processors on different OMAP versions. It controls the
boot address and mode for DSP based subsystems like: IVA 2.1
(OMAP2430), IVA 2.2 (OMAP3) and DSP (OMAP4).
If contained within SCM registers, when a processor is
booting it uses BOOTADDR to start running the code at that
location. BOOTMOD register specifies a different set of
modes for the processor to execute when booting (from direct,
idle, self-loop, user and default).
Since there was no offset associated with OMAP4, this patch
defines it.
Signed-off-by: Omar Ramirez Luna <omar.luna@linaro.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/include')
| -rw-r--r-- | arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h index 2f7ac70..0197082 100644 --- a/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h +++ b/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h @@ -42,6 +42,7 @@ #define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268 #define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4 #define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300 +#define OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR 0x0304 #define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314 #define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318 #define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320 |