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authorKevin Hilman <khilman@ti.com>2012-11-08 19:08:50 (GMT)
committerTony Lindgren <tony@atomide.com>2012-11-12 22:11:47 (GMT)
commit1ef43369c681bf30a980a4ba42df20514b15fdda (patch)
tree0e0ed0d2064a58bcc33a4bb97f8970b2687659c2 /arch/arm/mach-omap2/twl-common.c
parentcbf6bae1044286a89955d7c4b3a8d6d84a9916b3 (diff)
downloadlinux-fsl-qoriq-1ef43369c681bf30a980a4ba42df20514b15fdda.tar.xz
ARM: OMAP4: TWL: mux sys_drm_msecure as output for PMIC
On OMAP4 boards using the TWL6030 PMIC, the sys_drm_msecure is connected to the MSECURE input of the TWL6030 PMIC. This signal controls the secure-mode operation of the PMIC. If its not mux'd correctly, some functionality of the PMIC will not be accessible since the PMIC will be in secure mode. For example, if the TWL RTC is in secure mode, most of its registers are read-only, meaning (re)programming the RTC (e.g. for wakeup from suspend) will fail. To fix, ensure the signal is properly mux'd as output when TWL is intialized. This fix is required when using recent versions of u-boot (>= v2012.04.01) since u-boot is no longer setting the default mux for this pin. Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/twl-common.c')
-rw-r--r--arch/arm/mach-omap2/twl-common.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 635e109..96cae8b 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -73,6 +73,7 @@ void __init omap4_pmic_init(const char *pmic_type,
{
/* PMIC part*/
omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
+ omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT);
omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
/* Register additional devices on i2c1 bus if needed */