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| author | Thomas Reitmayr <treitmayr@devbase.at> | 2009-06-01 11:38:33 (GMT) |
|---|---|---|
| committer | Nicolas Pitre <nico@cam.org> | 2009-06-08 17:04:59 (GMT) |
| commit | 6462c6160af557c310d5941f4700ea2c7f6c67b2 (patch) | |
| tree | d43913472c3f77a50eaf26072beceba43b532870 /arch/arm/mach-orion5x/include | |
| parent | e8b2b7ba1200de8e50788e358e2d945a0c0fcfad (diff) | |
| download | linux-fsl-qoriq-6462c6160af557c310d5941f4700ea2c7f6c67b2.tar.xz | |
[ARM] orion5x: Change names of defines for Reset-Out-Mask register
The name of the define for the Reset-Out-Mask register as well as its
bit for the watchdog reset are changed to match the names used for
Kirkwood (which in turn match the processor specification more
closely). There is no functional change.
This patch prepares for adding orion5x_wdt as a platform device to
Kirkwood.
Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mach-orion5x/include')
| -rw-r--r-- | arch/arm/mach-orion5x/include/mach/bridge-regs.h | 4 | ||||
| -rw-r--r-- | arch/arm/mach-orion5x/include/mach/system.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h index be896e5..5c9744c 100644 --- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h +++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h @@ -17,8 +17,8 @@ #define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE | 0x104) -#define CPU_RESET_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108) -#define WDT_RESET 0x0002 +#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108) +#define WDT_RESET_OUT_EN 0x0002 #define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c) diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h index e912490..60e734c 100644 --- a/arch/arm/mach-orion5x/include/mach/system.h +++ b/arch/arm/mach-orion5x/include/mach/system.h @@ -23,7 +23,7 @@ static inline void arch_reset(char mode, const char *cmd) /* * Enable and issue soft reset */ - orion5x_setbits(CPU_RESET_MASK, (1 << 2)); + orion5x_setbits(RSTOUTn_MASK, (1 << 2)); orion5x_setbits(CPU_SOFT_RESET, 1); } |