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authorLinus Torvalds <torvalds@linux-foundation.org>2012-07-05 20:20:02 (GMT)
committerLinus Torvalds <torvalds@linux-foundation.org>2012-07-05 20:20:02 (GMT)
commitc4aed353b1b079eb4843e6a708fc68b4b28f72aa (patch)
treec8f8136680cccc32a27203a8c6a9795f2b20e8f0 /arch/arm/mach-pxa/hx4700.c
parent6bc51545da17614c3fd0fc782c0847c154a2c207 (diff)
parente15ebe05cce44c5164dbf8489841c18a887bcfc2 (diff)
downloadlinux-fsl-qoriq-c4aed353b1b079eb4843e6a708fc68b4b28f72aa.tar.xz
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann: "Small fixes on multiple ARM platforms - A build regression from a previous fix on dove and mv78xx0 - Two fixes for recently (3.5-rc1) changed mmp/pxa code - multiple omap2+ bug fixes - two trivial fixes for i.MX - one v3.5 regression for mxs" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: apx4devkit: fix FEC enabling PHY clock ARM: OMAP2+: hwmod data: Fix wrong McBSP clock alias on OMAP4 ARM: OMAP4: hwmod data: temporarily comment out data for the usb_host_fs and aess IP blocks ARM: Orion: Fix WDT compile for Dove and MV78xx0 ARM: mmp: remove mach/gpio-pxa.h ARM: imx: assert SCC gate stays enabled ARM: OMAP4: TWL6030: ensure sys_nirq1 is mux'd and wakeup enabled ARM: OMAP2: Overo: init I2C before MMC to fix MMC suspend/resume failure ARM: imx27_visstrim_m10: Do not include <asm/system.h> ARM: pxa: hx4700: Fix basic suspend/resume
Diffstat (limited to 'arch/arm/mach-pxa/hx4700.c')
-rw-r--r--arch/arm/mach-pxa/hx4700.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index d09da6a..d3de84b 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -127,7 +127,11 @@ static unsigned long hx4700_pin_config[] __initdata = {
GPIO19_SSP2_SCLK,
GPIO86_SSP2_RXD,
GPIO87_SSP2_TXD,
- GPIO88_GPIO,
+ GPIO88_GPIO | MFP_LPM_DRIVE_HIGH, /* TSC2046_CS */
+
+ /* BQ24022 Regulator */
+ GPIO72_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_nCHARGE_EN */
+ GPIO96_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_ISET2 */
/* HX4700 specific input GPIOs */
GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */
@@ -135,6 +139,10 @@ static unsigned long hx4700_pin_config[] __initdata = {
GPIO14_GPIO, /* nWLAN_IRQ */
/* HX4700 specific output GPIOs */
+ GPIO61_GPIO | MFP_LPM_DRIVE_HIGH, /* W3220_nRESET */
+ GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* ASIC3_nRESET */
+ GPIO81_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_GP_nRESET */
+ GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_HW_nRESET */
GPIO102_GPIO | MFP_LPM_DRIVE_LOW, /* SYNAPTICS_POWER_ON */
GPIO10_GPIO, /* GSM_IRQ */
@@ -872,14 +880,19 @@ static struct gpio global_gpios[] = {
{ GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" },
{ GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" },
{ GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" },
+ { GPIO61_HX4700_W3220_nRESET, GPIOF_OUT_INIT_HIGH, "W3220_nRESET" },
{ GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" },
+ { GPIO81_HX4700_CPU_GP_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_GP_nRESET" },
{ GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" },
+ { GPIO116_HX4700_CPU_HW_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_HW_nRESET" },
};
static void __init hx4700_init(void)
{
int ret;
+ PCFR = PCFR_GPR_EN | PCFR_OPDE;
+
pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1);
ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios));