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author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2010-11-24 03:54:19 (GMT) |
---|---|---|
committer | Eric Miao <eric.y.miao@gmail.com> | 2010-12-18 13:02:14 (GMT) |
commit | a4553358d94b4a1f3e6f24aacfd076022ac14855 (patch) | |
tree | 7d6d7909730801a6f512aa2a7f637353ce0931bf /arch/arm/mach-pxa/include | |
parent | aae8224ddd72e045bb92eaf6b73b89282c771c69 (diff) | |
download | linux-fsl-qoriq-a4553358d94b4a1f3e6f24aacfd076022ac14855.tar.xz |
ARM: pxa: support pxa95x
The core of PXA955 is PJ4. Add new PJ4 support. And add new macro
CONFIG_PXA95x.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-pxa/include')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/hardware.h | 34 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/irqs.h | 1 |
2 files changed, 26 insertions, 9 deletions
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index e480d1e..6957ba5 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h @@ -195,14 +195,15 @@ #define __cpu_is_pxa935(id) (0) #endif -#ifdef CONFIG_CPU_PXA950 -#define __cpu_is_pxa950(id) \ - ({ \ +#ifdef CONFIG_CPU_PXA955 +#define __cpu_is_pxa955(id) \ + ({ \ unsigned int _id = (id) >> 4 & 0xfff; \ - _id == 0x697; \ - }) + _id == 0x581 || _id == 0xc08 \ + || _id == 0xb76; \ + }) #else -#define __cpu_is_pxa950(id) (0) +#define __cpu_is_pxa955(id) (0) #endif #define cpu_is_pxa210() \ @@ -255,10 +256,10 @@ __cpu_is_pxa935(read_cpuid_id()); \ }) -#define cpu_is_pxa950() \ +#define cpu_is_pxa955() \ ({ \ - __cpu_is_pxa950(read_cpuid_id()); \ - }) + __cpu_is_pxa955(read_cpuid_id()); \ + }) /* @@ -297,6 +298,15 @@ #define __cpu_is_pxa93x(id) (0) #endif +#ifdef CONFIG_PXA95x +#define __cpu_is_pxa95x(id) \ + ({ \ + __cpu_is_pxa955(id); \ + }) +#else +#define __cpu_is_pxa95x(id) (0) +#endif + #define cpu_is_pxa2xx() \ ({ \ __cpu_is_pxa2xx(read_cpuid_id()); \ @@ -311,6 +321,12 @@ ({ \ __cpu_is_pxa93x(read_cpuid_id()); \ }) + +#define cpu_is_pxa95x() \ + ({ \ + __cpu_is_pxa95x(read_cpuid_id()); \ + }) + /* * return current memory and LCD clock frequency in units of 10kHz */ diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index cb7ee26..a4285fc 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h @@ -84,6 +84,7 @@ #define IRQ_PXA935_MMC0 PXA_IRQ(72) /* MMC0 Controller (PXA935) */ #define IRQ_PXA935_MMC1 PXA_IRQ(73) /* MMC1 Controller (PXA935) */ #define IRQ_PXA935_MMC2 PXA_IRQ(74) /* MMC2 Controller (PXA935) */ +#define IRQ_PXA955_MMC3 PXA_IRQ(75) /* MMC3 Controller (PXA955) */ #define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ #define PXA_GPIO_IRQ_BASE PXA_IRQ(96) |