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author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2010-11-24 03:54:22 (GMT) |
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committer | Eric Miao <eric.y.miao@gmail.com> | 2010-12-18 13:02:17 (GMT) |
commit | a79a9ad94acdbd0106491f5a444167636562460f (patch) | |
tree | ed39747fe7278a08613e8ee1315c360f7774a5ae /arch/arm/mach-pxa/include | |
parent | 3f408fa071418183742110f7314d6b596916e31e (diff) | |
download | linux-fsl-qoriq-a79a9ad94acdbd0106491f5a444167636562460f.tar.xz |
ARM: pxa: sanitize IRQ registers access based on offset
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Diffstat (limited to 'arch/arm/mach-pxa/include')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/regs-intc.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/mach-pxa/include/mach/regs-intc.h b/arch/arm/mach-pxa/include/mach/regs-intc.h index 68464ce..662288e 100644 --- a/arch/arm/mach-pxa/include/mach/regs-intc.h +++ b/arch/arm/mach-pxa/include/mach/regs-intc.h @@ -27,8 +27,4 @@ #define ICFP3 __REG(0x40D0013C) /* Interrupt Controller FIQ Pending Register 3 */ #define ICPR3 __REG(0x40D00140) /* Interrupt Controller Pending Register 3 */ -#define IPR(x) __REG(0x40D0001C + (x < 32 ? (x << 2) \ - : (x < 64 ? (0x94 + ((x - 32) << 2)) \ - : (0x128 + ((x - 64) << 2))))) - #endif /* __ASM_MACH_REGS_INTC_H */ |