diff options
| author | Igor Grinberg <grinberg@compulab.co.il> | 2013-01-13 11:49:47 (GMT) |
|---|---|---|
| committer | Haojian Zhuang <haojian.zhuang@linaro.org> | 2013-01-23 08:56:32 (GMT) |
| commit | d107a204154ddd79339203c2deeb7433f0cf6777 (patch) | |
| tree | 84931e8d1797c48edbc3e17cd4b76d7fae80d100 /arch/arm/mach-pxa/include | |
| parent | 6a639bb83b751bfed61be13c0e3df17e5a970a94 (diff) | |
| download | linux-fsl-qoriq-d107a204154ddd79339203c2deeb7433f0cf6777.tar.xz | |
ARM: PXA3xx: program the CSMSADRCFG register
The Chip Select Configuration Register must be programmed to 0x2 in
order to achieve the correct behavior of the Static Memory Controller.
Without this patch devices wired to DFI and accessed through SMC cannot
be accessed after resume from S2.
Do not rely on the boot loader to program the CSMSADRCFG register by
programming it in the kernel smemc module.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Cc: stable@vger.kernel.org
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Diffstat (limited to 'arch/arm/mach-pxa/include')
| -rw-r--r-- | arch/arm/mach-pxa/include/mach/smemc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/include/mach/smemc.h b/arch/arm/mach-pxa/include/mach/smemc.h index b7de471..b802f28 100644 --- a/arch/arm/mach-pxa/include/mach/smemc.h +++ b/arch/arm/mach-pxa/include/mach/smemc.h @@ -37,6 +37,7 @@ #define CSADRCFG1 (SMEMC_VIRT + 0x84) /* Address Configuration Register for CS1 */ #define CSADRCFG2 (SMEMC_VIRT + 0x88) /* Address Configuration Register for CS2 */ #define CSADRCFG3 (SMEMC_VIRT + 0x8C) /* Address Configuration Register for CS3 */ +#define CSMSADRCFG (SMEMC_VIRT + 0xA0) /* Chip Select Configuration Register */ /* * More handy macros for PCMCIA |