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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-02 08:54:01 (GMT) |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-02 08:54:01 (GMT) |
| commit | 29cb3cd208dd0e4471bb80bec4facc49ceb199fa (patch) | |
| tree | 035128bf7af997d5e1e5208c900ba78c5a1df46d /arch/arm/mach-pxa/pxa3xx.c | |
| parent | cbe263497def23befb6f475977661bae5d1f82e4 (diff) | |
| download | linux-fsl-qoriq-29cb3cd208dd0e4471bb80bec4facc49ceb199fa.tar.xz | |
ARM: pm: allow suspend finisher to return error codes
There are SoCs where attempting to enter a low power state is ignored,
and the CPU continues executing instructions with all state preserved.
It is over-complex at that point to disable the MMU just to call the
resume path.
Instead, allow the suspend finisher to return error codes to abort
suspend in this circumstance, where the cpu_suspend internals will then
unwind the saved state on the stack. Also omit the tlb flush as no
changes to the page tables will have happened.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/pxa3xx.c')
| -rw-r--r-- | arch/arm/mach-pxa/pxa3xx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 9fe947b..ef1c56a 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -148,7 +148,7 @@ static void pxa3xx_cpu_pm_suspend(void) asm volatile("mra %Q0, %R0, acc0" : "=r" (acc0)); #endif - extern void pxa3xx_finish_suspend(unsigned long); + extern int pxa3xx_finish_suspend(unsigned long); /* resuming from D2 requires the HSIO2/BOOT/TPM clocks enabled */ CKENA |= (1 << CKEN_BOOT) | (1 << CKEN_TPM); |