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| author | Olof Johansson <olof@lixom.net> | 2013-02-06 01:01:56 (GMT) |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2013-02-06 01:01:56 (GMT) |
| commit | cf55f672c325f234d96911571a775b2e7d9cf284 (patch) | |
| tree | 9242f9ddb0f556dca7884c60ad81aefbe35ae258 /arch/arm/mach-s3c24xx/s3c2412-power.h | |
| parent | 5060c8881a4b177e27d5bcf351212f2bee125955 (diff) | |
| parent | 37c3adca81b282bdf310d5ed54acbc28ac0b20a3 (diff) | |
| download | linux-fsl-qoriq-cf55f672c325f234d96911571a775b2e7d9cf284.tar.xz | |
Merge branch 'next/cleanup-s3c24xx-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
From Kukjin Kim:
This is 4th cleanup for Samsung S3C24XX stuff, and removes plat-s3c24xx
directory.
* 'next/cleanup-s3c24xx-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S3C24XX: header mach/regs-mem.h local
ARM: S3C24XX: header mach/regs-power.h local
ARM: S3C24XX: header mach/regs-s3c2412-mem.h local
ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/
Diffstat (limited to 'arch/arm/mach-s3c24xx/s3c2412-power.h')
| -rw-r--r-- | arch/arm/mach-s3c24xx/s3c2412-power.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c24xx/s3c2412-power.h b/arch/arm/mach-s3c24xx/s3c2412-power.h new file mode 100644 index 0000000..1b02c5d --- /dev/null +++ b/arch/arm/mach-s3c24xx/s3c2412-power.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H +#define __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H __FILE__ + +#define S3C24XX_PWRREG(x) ((x) + S3C24XX_VA_CLKPWR) + +#define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20) +#define S3C2412_PWRCFG S3C24XX_PWRREG(0x24) + +#define S3C2412_INFORM0 S3C24XX_PWRREG(0x70) +#define S3C2412_INFORM1 S3C24XX_PWRREG(0x74) +#define S3C2412_INFORM2 S3C24XX_PWRREG(0x78) +#define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C) + +#define S3C2412_PWRCFG_BATF_IRQ (1 << 0) +#define S3C2412_PWRCFG_BATF_IGNORE (2 << 0) +#define S3C2412_PWRCFG_BATF_SLEEP (3 << 0) +#define S3C2412_PWRCFG_BATF_MASK (3 << 0) + +#define S3C2412_PWRCFG_STANDBYWFI_IGNORE (0 << 6) +#define S3C2412_PWRCFG_STANDBYWFI_IDLE (1 << 6) +#define S3C2412_PWRCFG_STANDBYWFI_STOP (2 << 6) +#define S3C2412_PWRCFG_STANDBYWFI_SLEEP (3 << 6) +#define S3C2412_PWRCFG_STANDBYWFI_MASK (3 << 6) + +#define S3C2412_PWRCFG_RTC_MASKIRQ (1 << 8) +#define S3C2412_PWRCFG_NAND_NORST (1 << 9) + +#endif /* __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H */ |