diff options
| author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2013-06-04 05:11:24 (GMT) |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2013-06-11 08:32:22 (GMT) |
| commit | 3dd691ef07abd55154de913b241f9804fc78b979 (patch) | |
| tree | e42d9a3f7578498dbcf315a6d0532727b2f0aabc /arch/arm/mach-shmobile/clock-r8a7778.c | |
| parent | b6bb9a6426cab90216763374b9d2ebc4abc48016 (diff) | |
| download | linux-fsl-qoriq-3dd691ef07abd55154de913b241f9804fc78b979.tar.xz | |
ARM: shmobile: r8a7778: add support HSPI clock
This patch adds r8a7778 HSPI clock support.
It also adds shyway_clk which is requiested
from sh-hspi driver
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-r8a7778.c')
| -rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7778.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c index 1386c59..c2c1895 100644 --- a/arch/arm/mach-shmobile/clock-r8a7778.c +++ b/arch/arm/mach-shmobile/clock-r8a7778.c @@ -108,6 +108,7 @@ enum { MSTP030, MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, MSTP016, MSTP015, + MSTP007, MSTP_NR }; static struct clk mstp_clks[MSTP_NR] = { @@ -127,10 +128,12 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */ [MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */ [MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */ + [MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 7, 0), /* HSPI */ }; static struct clk_lookup lookups[] = { /* main */ + CLKDEV_CON_ID("shyway_clk", &s_clk), CLKDEV_CON_ID("peripheral_clk", &p_clk), /* MSTP32 clocks */ @@ -150,6 +153,9 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */ CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */ + CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */ + CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */ + CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */ }; void __init r8a7778_clock_init(void) |