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| author | Arnd Bergmann <arnd@arndb.de> | 2012-03-04 20:55:46 (GMT) |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-03-04 20:57:06 (GMT) |
| commit | c71656c018c8551eca45b2f873b239f0303d74cb (patch) | |
| tree | bab4825a6ed993c98ac4967f2aa976536f58568a /arch/arm/mach-tegra/include | |
| parent | cb66bb1d6fab2d91960c20f256c6986d5afac1a1 (diff) | |
| parent | e186ad74c0941f5caeda28bde76dab903b342c1c (diff) | |
| download | linux-fsl-qoriq-c71656c018c8551eca45b2f873b239f0303d74cb.tar.xz | |
Merge tag 'tegra-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra into tegra/soc
From: Olof Johansson <olof@lixom.net>
SoC new development for tegra SoCs, mostly tegra30 core support.
It also includes one stray bugfix that was misapplied (should have been
in soc-drivers), but it went out to the stable branches before I noticed
so I've left it in.
* tag 'tegra-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra:
ARM: tegra: Demote EMC clock inconsistency BUG to WARN
ARM: tegra: Avoid compiling cpuidle code when not configured
ARM: tegra: cpuidle driver for tegra
ARM: tegra: assembler code for LP3
ARM: tegra: definitions for flow controller
ARM: tegra: initialize basic system clocks
ARM: tegra: enable tegra30 clock framework
ARM: tegra: implement basic tegra30 clock framework
ARM: tegra: add support for new clock framework features
ARM: tegra: add support for tegra30 interrupts
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-tegra/include')
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/clk.h | 10 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/iomap.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/irqs.h | 7 |
3 files changed, 17 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/include/mach/clk.h b/arch/arm/mach-tegra/include/mach/clk.h index fc3ecb6..d97e403 100644 --- a/arch/arm/mach-tegra/include/mach/clk.h +++ b/arch/arm/mach-tegra/include/mach/clk.h @@ -22,10 +22,20 @@ struct clk; +enum tegra_clk_ex_param { + TEGRA_CLK_VI_INP_SEL, + TEGRA_CLK_DTV_INVERT, + TEGRA_CLK_NAND_PAD_DIV2_ENB, + TEGRA_CLK_PLLD_CSI_OUT_ENB, + TEGRA_CLK_PLLD_DSI_OUT_ENB, + TEGRA_CLK_PLLD_MIPI_MUX_SEL, +}; + void tegra_periph_reset_deassert(struct clk *c); void tegra_periph_reset_assert(struct clk *c); unsigned long clk_get_rate_all_locked(struct clk *c); void tegra2_sdmmc_tap_delay(struct clk *c, int delay); +int tegra_clk_cfg_ex(struct clk *c, enum tegra_clk_ex_param p, u32 setting); #endif diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h index 19dec3a..67644c9 100644 --- a/arch/arm/mach-tegra/include/mach/iomap.h +++ b/arch/arm/mach-tegra/include/mach/iomap.h @@ -74,6 +74,9 @@ #define TEGRA_QUATERNARY_ICTLR_BASE 0x60004300 #define TEGRA_QUATERNARY_ICTLR_SIZE SZ_64 +#define TEGRA_QUINARY_ICTLR_BASE 0x60004400 +#define TEGRA_QUINARY_ICTLR_SIZE SZ_64 + #define TEGRA_TMR1_BASE 0x60005000 #define TEGRA_TMR1_SIZE SZ_8 diff --git a/arch/arm/mach-tegra/include/mach/irqs.h b/arch/arm/mach-tegra/include/mach/irqs.h index a2146cd..aad1a2c 100644 --- a/arch/arm/mach-tegra/include/mach/irqs.h +++ b/arch/arm/mach-tegra/include/mach/irqs.h @@ -165,11 +165,12 @@ #define INT_QUAD_RES_30 (INT_QUAD_BASE + 30) #define INT_QUAD_RES_31 (INT_QUAD_BASE + 31) -#define INT_MAIN_NR (INT_QUAD_BASE + 32 - INT_PRI_BASE) - +/* Tegra30 has 5 banks of 32 IRQs */ +#define INT_MAIN_NR (32 * 5) #define INT_GPIO_BASE (INT_PRI_BASE + INT_MAIN_NR) -#define INT_GPIO_NR (28 * 8) +/* Tegra30 has 8 banks of 32 GPIOs */ +#define INT_GPIO_NR (32 * 8) #define TEGRA_NR_IRQS (INT_GPIO_BASE + INT_GPIO_NR) |