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author | Linus Walleij <linus.walleij@stericsson.com> | 2010-08-05 06:59:54 (GMT) |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-08-10 21:10:56 (GMT) |
commit | 3af8a8dad07527b25055b8b4c2a2b0d69362e7fb (patch) | |
tree | 1c2847dcddbeed9217c1fee8b92b16758426bb63 /arch/arm/mach-u300/clock.c | |
parent | b7276b236dcf400003179e77f5b4b4c05e1fb29c (diff) | |
download | linux-fsl-qoriq-3af8a8dad07527b25055b8b4c2a2b0d69362e7fb.tar.xz |
ARM: 6297/1: move U300 timer to dynamic clock lookup
This moves the U300 timer code to look up its clock rate from the
clock framework as is apropriate and also switches it over to use
the generic code for *calc_mult_shift() on clock source and clock
event.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-u300/clock.c')
-rw-r--r-- | arch/arm/mach-u300/clock.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-u300/clock.c b/arch/arm/mach-u300/clock.c index 7a94729..60acf9e 100644 --- a/arch/arm/mach-u300/clock.c +++ b/arch/arm/mach-u300/clock.c @@ -1204,10 +1204,14 @@ static struct clk timer_clk = { .lock = __SPIN_LOCK_UNLOCKED(timer_clk.lock), }; +/* + * There is a binary divider in the hardware that divides + * the 13MHz PLL by 13 down to 1 MHz. + */ static struct clk app_timer_clk = { .name = "TIMER_APP", .parent = &slow_clk, - .rate = 13000000, + .rate = 1000000, .hw_ctrld = true, .reset = true, .res_reg = U300_SYSCON_VBASE + U300_SYSCON_RSR, |