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| author | Ingo Molnar <mingo@elte.hu> | 2012-03-14 08:48:16 (GMT) |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2012-03-14 08:48:16 (GMT) |
| commit | c96a9876696d30783ad54399351a0bf3660db53f (patch) | |
| tree | 74daba0ed1fd2838e8eb527c4f7fe5262ee979bd /arch/arm/mm/Kconfig | |
| parent | d1f42e314c9c50541c79a6edf2b4cab63fe02ee3 (diff) | |
| parent | fde7d9049e55ab85a390be7f415d74c9f62dd0f9 (diff) | |
| download | linux-fsl-qoriq-c96a9876696d30783ad54399351a0bf3660db53f.tar.xz | |
Merge tag 'v3.3-rc7' into x86/platform
Merge reason: Update to the almost-final v3.3 kernel.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mm/Kconfig')
| -rw-r--r-- | arch/arm/mm/Kconfig | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 4cefb57..7edef91 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -631,7 +631,8 @@ comment "Processor Features" config ARM_LPAE bool "Support for the Large Physical Address Extension" - depends on MMU && CPU_V7 + depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \ + !CPU_32v4 && !CPU_32v3 help Say Y if you have an ARMv7 processor supporting the LPAE page table format and you would like to access memory beyond the @@ -882,6 +883,7 @@ config CACHE_XSC3L2 config ARM_L1_CACHE_SHIFT_6 bool + default y if CPU_V7 help Setting ARM L1 cache line size to 64 Bytes. |