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authorPaul Mundt <lethal@linux-sh.org>2012-05-10 02:51:07 (GMT)
committerPaul Mundt <lethal@linux-sh.org>2012-05-10 02:51:07 (GMT)
commit15f99cbd071aa402e113d342448603344a337046 (patch)
tree56f98892d1bd38029988eb8931e2321ef7e79aa0 /arch/arm/plat-omap/dma.c
parentb2212ea41dacda8cce0e7681a3a6ccc76c63802e (diff)
parent41797f75486d8ca3b98d7658c2a506ac7879a8e5 (diff)
downloadlinux-fsl-qoriq-15f99cbd071aa402e113d342448603344a337046.tar.xz
Merge branch 'sh/rsk-updates' into sh-latest
Conflicts: arch/sh/Kconfig Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/arm/plat-omap/dma.c')
-rw-r--r--arch/arm/plat-omap/dma.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index ecdb3da..c58d896 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -916,6 +916,13 @@ void omap_start_dma(int lch)
l |= OMAP_DMA_CCR_BUFFERING_DISABLE;
l |= OMAP_DMA_CCR_EN;
+ /*
+ * As dma_write() uses IO accessors which are weakly ordered, there
+ * is no guarantee that data in coherent DMA memory will be visible
+ * to the DMA device. Add a memory barrier here to ensure that any
+ * such data is visible prior to enabling DMA.
+ */
+ mb();
p->dma_write(l, CCR, lch);
dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
@@ -965,6 +972,13 @@ void omap_stop_dma(int lch)
p->dma_write(l, CCR, lch);
}
+ /*
+ * Ensure that data transferred by DMA is visible to any access
+ * after DMA has been disabled. This is important for coherent
+ * DMA regions.
+ */
+ mb();
+
if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
int next_lch, cur_lch = lch;
char dma_chan_link_map[dma_lch_count];