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author | Ben Dooks <ben-linux@fluff.org> | 2008-10-30 10:14:32 (GMT) |
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committer | Ben Dooks <ben-linux@fluff.org> | 2008-10-30 10:17:12 (GMT) |
commit | 180ee700ddfcc882d90410d979a4b3a804380ed2 (patch) | |
tree | 2b23495de69ee956c0245f6f15e003ea57ee7779 /arch/arm/plat-s3c/include | |
parent | e946217e4fdaa67681bbabfa8e6b18641921f750 (diff) | |
download | linux-fsl-qoriq-180ee700ddfcc882d90410d979a4b3a804380ed2.tar.xz |
[ARM] S3C: Move regs-watchdog.h to arch/arm/plat-s3c/include/plat
Move regs-watchdog.h to arch/arm/plat-s3c/include/plat ready
to clean out the old include directories
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c/include')
-rw-r--r-- | arch/arm/plat-s3c/include/plat/regs-watchdog.h | 41 | ||||
-rw-r--r-- | arch/arm/plat-s3c/include/plat/uncompress.h | 2 |
2 files changed, 42 insertions, 1 deletions
diff --git a/arch/arm/plat-s3c/include/plat/regs-watchdog.h b/arch/arm/plat-s3c/include/plat/regs-watchdog.h new file mode 100644 index 0000000..4938492 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/regs-watchdog.h @@ -0,0 +1,41 @@ +/* arch/arm/mach-s3c2410/include/mach/regs-watchdog.h + * + * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> + * http://www.simtec.co.uk/products/SWLINUX/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C2410 Watchdog timer control +*/ + + +#ifndef __ASM_ARCH_REGS_WATCHDOG_H +#define __ASM_ARCH_REGS_WATCHDOG_H + +#define S3C_WDOGREG(x) ((x) + S3C_VA_WATCHDOG) + +#define S3C2410_WTCON S3C_WDOGREG(0x00) +#define S3C2410_WTDAT S3C_WDOGREG(0x04) +#define S3C2410_WTCNT S3C_WDOGREG(0x08) + +/* the watchdog can either generate a reset pulse, or an + * interrupt. + */ + +#define S3C2410_WTCON_RSTEN (0x01) +#define S3C2410_WTCON_INTEN (1<<2) +#define S3C2410_WTCON_ENABLE (1<<5) + +#define S3C2410_WTCON_DIV16 (0<<3) +#define S3C2410_WTCON_DIV32 (1<<3) +#define S3C2410_WTCON_DIV64 (2<<3) +#define S3C2410_WTCON_DIV128 (3<<3) + +#define S3C2410_WTCON_PRESCALE(x) ((x) << 8) +#define S3C2410_WTCON_PRESCALE_MASK (0xff00) + +#endif /* __ASM_ARCH_REGS_WATCHDOG_H */ + + diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-s3c/include/plat/uncompress.h index 4df006b..8a8a927 100644 --- a/arch/arm/plat-s3c/include/plat/uncompress.h +++ b/arch/arm/plat-s3c/include/plat/uncompress.h @@ -28,7 +28,7 @@ static void arch_detect_cpu(void); /* defines for UART registers */ #include <plat/regs-serial.h> -#include <asm/plat-s3c/regs-watchdog.h> +#include <plat/regs-watchdog.h> /* working in physical space... */ #undef S3C2410_WDOGREG |