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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-06 01:18:05 (GMT)
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-06 01:18:05 (GMT)
commit7abec10c623d9e0416dab6919a0ea22e6283516b (patch)
tree83aa79c369e99c4fc60eea91ebd399b7689b312e /arch/arm/plat-s3c24xx/include/plat/regs-iis.h
parent0de9adf284ec20454ecf37ffd98e7e98ba7292d6 (diff)
parentcfaf8fc5b59527281e9ddc2e0e04e1127936e17f (diff)
downloadlinux-fsl-qoriq-7abec10c623d9e0416dab6919a0ea22e6283516b.tar.xz
Merge branch 'next/cleanup3' of git://git.linaro.org/people/arnd/arm-soc
* 'next/cleanup3' of git://git.linaro.org/people/arnd/arm-soc: (79 commits) ARM: SAMSUNG: Move fimc plat. device from board files to plat-samsung ARM: SAMSUNG: Cleanup resources by using macro ARM: SAMSUNG: Cleanup plat-samsung/devs.c and devs.h ARM: S5P: To merge devs.c files to one devs.c ARM: S3C64XX: To merge devs.c files to one devs.c ARM: S3C24XX: To merge s3c24xx devs.c files to one devs.c ARM: S5P64X0: Add Power Management support ARM: S5P: Make the sleep code common for S5P series SoCs ARM: S5P: Make the common S5P PM code conditionally compile ARM: SAMSUNG: Move S5P header files to plat-samsung ARM: SAMSUNG: Move S3C24XX header files to plat-samsung ARM: SAMSUNG: Moving each SoC support header files ARM: SAMSUNG: Consolidate plat/pll.h ARM: SAMSUNG: Consolidate plat/pwm-clock.h ARM: SAMSUNG: Cleanup mach/clkdev.h ARM: SAMSUNG: remove sdhci default configuration setup platform helper ARM: EXYNOS4: Add FIMC device on SMDKV310 board ARM: EXYNOS4: Add header file protection macros ARM: EXYNOS4: Add usb ehci device to the SMDKV310 ARM: S3C2443: Add hsspi-clock from pclk and rename S3C2443 hsspi sclk ... Fix up conflicts in - arch/arm/mach-exynos4/{Kconfig,clock.c} ARM_CPU_SUSPEND, various random device tables (gah!) - drivers/gpio/Makefile sa1100 gpio added, samsung gpio drivers merged
Diffstat (limited to 'arch/arm/plat-s3c24xx/include/plat/regs-iis.h')
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/regs-iis.h68
1 files changed, 0 insertions, 68 deletions
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-iis.h b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h
deleted file mode 100644
index cc44e0e..0000000
--- a/arch/arm/plat-s3c24xx/include/plat/regs-iis.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-iis.h
- *
- * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
- * http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 IIS register definition
-*/
-
-#ifndef __ASM_ARCH_REGS_IIS_H
-#define __ASM_ARCH_REGS_IIS_H
-
-#define S3C2410_IISCON (0x00)
-
-#define S3C2410_IISCON_LRINDEX (1<<8)
-#define S3C2410_IISCON_TXFIFORDY (1<<7)
-#define S3C2410_IISCON_RXFIFORDY (1<<6)
-#define S3C2410_IISCON_TXDMAEN (1<<5)
-#define S3C2410_IISCON_RXDMAEN (1<<4)
-#define S3C2410_IISCON_TXIDLE (1<<3)
-#define S3C2410_IISCON_RXIDLE (1<<2)
-#define S3C2410_IISCON_PSCEN (1<<1)
-#define S3C2410_IISCON_IISEN (1<<0)
-
-#define S3C2410_IISMOD (0x04)
-
-#define S3C2440_IISMOD_MPLL (1<<9)
-#define S3C2410_IISMOD_SLAVE (1<<8)
-#define S3C2410_IISMOD_NOXFER (0<<6)
-#define S3C2410_IISMOD_RXMODE (1<<6)
-#define S3C2410_IISMOD_TXMODE (2<<6)
-#define S3C2410_IISMOD_TXRXMODE (3<<6)
-#define S3C2410_IISMOD_LR_LLOW (0<<5)
-#define S3C2410_IISMOD_LR_RLOW (1<<5)
-#define S3C2410_IISMOD_IIS (0<<4)
-#define S3C2410_IISMOD_MSB (1<<4)
-#define S3C2410_IISMOD_8BIT (0<<3)
-#define S3C2410_IISMOD_16BIT (1<<3)
-#define S3C2410_IISMOD_BITMASK (1<<3)
-#define S3C2410_IISMOD_256FS (0<<2)
-#define S3C2410_IISMOD_384FS (1<<2)
-#define S3C2410_IISMOD_16FS (0<<0)
-#define S3C2410_IISMOD_32FS (1<<0)
-#define S3C2410_IISMOD_48FS (2<<0)
-#define S3C2410_IISMOD_FS_MASK (3<<0)
-
-#define S3C2410_IISPSR (0x08)
-#define S3C2410_IISPSR_INTMASK (31<<5)
-#define S3C2410_IISPSR_INTSHIFT (5)
-#define S3C2410_IISPSR_EXTMASK (31<<0)
-#define S3C2410_IISPSR_EXTSHFIT (0)
-
-#define S3C2410_IISFCON (0x0c)
-
-#define S3C2410_IISFCON_TXDMA (1<<15)
-#define S3C2410_IISFCON_RXDMA (1<<14)
-#define S3C2410_IISFCON_TXENABLE (1<<13)
-#define S3C2410_IISFCON_RXENABLE (1<<12)
-#define S3C2410_IISFCON_TXMASK (0x3f << 6)
-#define S3C2410_IISFCON_TXSHIFT (6)
-#define S3C2410_IISFCON_RXMASK (0x3f)
-#define S3C2410_IISFCON_RXSHIFT (0)
-
-#define S3C2410_IISFIFO (0x10)
-#endif /* __ASM_ARCH_REGS_IIS_H */