diff options
author | Marek Szyprowski <m.szyprowski@samsung.com> | 2010-10-01 01:40:37 (GMT) |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-20 22:54:56 (GMT) |
commit | 170a46177094b390299d1206748d7f15cd375dc9 (patch) | |
tree | 81fc5270bbc74d1cf946b2ed265fb85c4dee3ed8 /arch/arm/plat-samsung/include/plat/gpio-core.h | |
parent | ca1931ca1e87c32f9abaef378c6996b25774cb02 (diff) | |
download | linux-fsl-qoriq-170a46177094b390299d1206748d7f15cd375dc9.tar.xz |
ARM: S5P: Add common S5P GPIO Interrupt support
This patch adds common code to enable support of GPIO interrupt on
S5P SoCs.
The total number of GPIO pins is quite large on S5P SoCs. Registering
irq support for all of them would be a resource waste. Because of that
the interrupt support for standard GPIO pins is registered dynamically
by the s5p_register_gpio_interrupt() function.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title fixes]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/gpio-core.h')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/gpio-core.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h index e358c7d..c22c27c 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-core.h +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h @@ -43,6 +43,8 @@ struct s3c_gpio_cfg; * struct s3c_gpio_chip - wrapper for specific implementation of gpio * @chip: The chip structure to be exported via gpiolib. * @base: The base pointer to the gpio configuration registers. + * @group: The group register number for gpio interrupt support. + * @irq_base: The base irq number. * @config: special function and pull-resistor control information. * @lock: Lock for exclusive access to this gpio bank. * @pm_save: Save information for suspend/resume support. @@ -63,6 +65,8 @@ struct s3c_gpio_chip { struct s3c_gpio_cfg *config; struct s3c_gpio_pm *pm; void __iomem *base; + int irq_base; + int group; spinlock_t lock; #ifdef CONFIG_PM u32 pm_save[4]; |