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author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-11-11 07:32:21 (GMT) |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-11-11 07:32:21 (GMT) |
commit | 05ad391dbc2bd27b8d868cf9c3ec1b68a2126a16 (patch) | |
tree | abfc59028a00a15428ab8b14abe8a9e99f69a9a3 /arch/arm64/include/asm/pgtable.h | |
parent | 8b5baa460b69c27389353eeff0dbe51dc695da60 (diff) | |
parent | 67317c2689567c24d18e0dd43ab6d409fd42dc6e (diff) | |
download | linux-fsl-qoriq-05ad391dbc2bd27b8d868cf9c3ec1b68a2126a16.tar.xz |
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64
Pull ARM64 update from Catalin Marinas:
"Main features:
- Ticket-based spinlock implementation and lockless lockref support
- Big endian support
- CPU hotplug support, currently for PSCI (Power State Coordination
Interface) capable firmware
- Virtual address space extended to 42-bit in the 64K page
configuration (maximum VA space with 2 levels of page tables)
- Compat (AArch32) kuser helpers updated to ARMv8 (make use of
load-acquire/store-release instructions)
- Code cleanup, defconfig update and minor fixes"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64: (43 commits)
ARM64: /proc/interrupts: display IPIs of online CPUs only
arm64: locks: Remove CONFIG_GENERIC_LOCKBREAK
arm64: KVM: vgic: byteswap GICv2 access on world switch if BE
arm64: KVM: initialize HYP mode following the kernel endianness
arm64: compat: Clear the IT state independent of the 32-bit ARM or Thumb-2 mode
arm64: Use 42-bit address space with 64K pages
arm64: module: ensure instruction is little-endian before manipulation
arm64: defconfig: Enable CONFIG_PREEMPT by default
arm64: fix access to preempt_count from assembly code
arm64: move enabling of GIC before CPUs are set online
arm64: use generic RW_DATA_SECTION macro in linker script
arm64: Slightly improve the warning on CPU0 enable-method
ARM64: simplify cpu_read_bootcpu_ops using OF/DT helper
ARM64: DT: define ARM64 specific arch_match_cpu_phys_id
arm64: allow ioremap_cache() to use existing RAM mappings
arm64: update 32-bit kuser helpers to ARMv8
arm64: perf: fix event number mask
arm64: kconfig: allow CPU_BIG_ENDIAN to be selected
arm64: Fix the endianness of arch_spinlock_t
arm64: big-endian: write CPU holding pen address as LE
...
Diffstat (limited to 'arch/arm64/include/asm/pgtable.h')
-rw-r--r-- | arch/arm64/include/asm/pgtable.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index f0bebc5..17bd3af 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -33,7 +33,7 @@ /* * VMALLOC and SPARSEMEM_VMEMMAP ranges. */ -#define VMALLOC_START UL(0xffffff8000000000) +#define VMALLOC_START (UL(0xffffffffffffffff) << VA_BITS) #define VMALLOC_END (PAGE_OFFSET - UL(0x400000000) - SZ_64K) #define vmemmap ((struct page *)(VMALLOC_END + SZ_64K)) |