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| author | Catalin Marinas <catalin.marinas@arm.com> | 2013-11-29 10:56:14 (GMT) |
|---|---|---|
| committer | Jiri Slaby <jslaby@suse.cz> | 2014-03-31 12:22:22 (GMT) |
| commit | dffdacf81b8705d6d1a43ccb9fdf60da750f75f9 (patch) | |
| tree | 9f745f29b5318a2048337325c089d697b554466c /arch/arm64 | |
| parent | 8c992df26ee88eb93c39c1ce187c9003a997001e (diff) | |
| download | linux-fsl-qoriq-dffdacf81b8705d6d1a43ccb9fdf60da750f75f9.tar.xz | |
arm64: Use Normal NonCacheable memory for writecombine
commit 4f00130b70e5eee813cc7bc298e0f3fdf79673cc upstream.
This provides better performance compared to Device GRE and also allows
unaligned accesses. Such memory is intended to be used with standard RAM
(e.g. framebuffers) and not I/O.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/include/asm/pgtable.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 965c28f..82d95a7 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -255,7 +255,7 @@ static inline int has_transparent_hugepage(void) #define pgprot_noncached(prot) \ __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE)) #define pgprot_writecombine(prot) \ - __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_GRE)) + __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC)) #define pgprot_dmacoherent(prot) \ __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC)) #define __HAVE_PHYS_MEM_ACCESS_PROT |