diff options
| author | Jingchang Lu <jingchang.lu@freescale.com> | 2014-07-21 09:40:21 (GMT) |
|---|---|---|
| committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:35:44 (GMT) |
| commit | 138d7b8f762489543abf8290333b6fa69baff837 (patch) | |
| tree | 876fabc16d1c5f34d56f461cc3241b04e96b28b1 /arch/arm | |
| parent | a25f458873b059da4b0684a36536b27100d3e830 (diff) | |
| download | linux-fsl-qoriq-138d7b8f762489543abf8290333b6fa69baff837.tar.xz | |
arm: dts: ls1021a-qds: add tbi node and aliases for enet phy
This move the tbi node to boards level device tree source.
And add aliases for enet phy to make it be found easily
by u-boot on dynamically change the enet "phy-handle" and
"phy-connection-type" property.
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Change-Id: I80748fdbbeab06cb5804128600369317dbececd6
Reviewed-on: http://git.am.freescale.net:8181/17830
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Huan Wang <alison.wang@freescale.com>
Reviewed-by: Li Xiubo <Li.Xiubo@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/ls1021a-qds.dts | 33 |
1 files changed, 24 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts index 2deed2d..d162b8b 100644 --- a/arch/arm/boot/dts/ls1021a-qds.dts +++ b/arch/arm/boot/dts/ls1021a-qds.dts @@ -13,6 +13,14 @@ / { model = "LS1021A QDS Board"; + aliases { + enet0_rgmii_phy = &rgmii_phy1; + enet1_rgmii_phy = &rgmii_phy2; + enet2_rgmii_phy = &rgmii_phy3; + enet0_sgmii_phy = &sgmii_phy1c; + enet1_sgmii_phy = &sgmii_phy1d; + }; + soc { leds { compatible = "pwm-leds"; @@ -85,21 +93,21 @@ &enet0 { tbi-handle = <&tbi0>; - phy-handle = <&physgmii1c>; + phy-handle = <&sgmii_phy1c>; phy-connection-type = "sgmii"; status = "okay"; }; &enet1 { tbi-handle = <&tbi0>; - phy-handle = <&physgmii1d>; + phy-handle = <&sgmii_phy1d>; phy-connection-type = "sgmii"; status = "okay"; }; &enet2 { - phy-handle = <&phyrgmii3>; - phy-connection-type = "rgmii"; + phy-handle = <&rgmii_phy3>; + phy-connection-type = "rgmii-id"; status = "okay"; }; @@ -243,7 +251,7 @@ reg = <0>; #address-cells = <1>; #size-cells = <0>; - phyrgmii1: ethernet-phy@1 { + rgmii_phy1: ethernet-phy@1 { reg = <0x1>; }; }; @@ -251,7 +259,7 @@ reg = <0x20>; #address-cells = <1>; #size-cells = <0>; - phyrgmii2: ethernet-phy@2 { + rgmii_phy2: ethernet-phy@2 { reg = <0x2>; }; }; @@ -259,7 +267,7 @@ reg = <0x40>; #address-cells = <1>; #size-cells = <0>; - phyrgmii3: ethernet-phy@3 { + rgmii_phy3: ethernet-phy@3 { reg = <0x3>; }; }; @@ -267,7 +275,7 @@ reg = <0x60>; #address-cells = <1>; #size-cells = <0>; - physgmii1c: ethernet-phy@1c { + sgmii_phy1c: ethernet-phy@1c { reg = <0x1c>; }; }; @@ -275,7 +283,7 @@ reg = <0x80>; #address-cells = <1>; #size-cells = <0>; - physgmii1d: ethernet-phy@1d { + sgmii_phy1d: ethernet-phy@1d { reg = <0x1d>; }; }; @@ -289,6 +297,13 @@ status = "okay"; }; +&mdio0 { + tbi0: tbi-phy@8 { + reg = <0x8>; + device_type = "tbi-phy"; + }; +}; + &pwm3 { status = "okay"; }; |