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author | Richard Kuo <rkuo@codeaurora.org> | 2012-03-27 22:38:09 (GMT) |
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committer | Richard Kuo <rkuo@codeaurora.org> | 2013-05-01 00:40:23 (GMT) |
commit | 60c4ba99e015afe879c2682967c8ca8d233f6d3c (patch) | |
tree | ddf41e569dd852c627ad8008b756d224694861c5 /arch/hexagon/kernel/ptrace.c | |
parent | 444dd742d3b0353c55c92f77e6732d932120c829 (diff) | |
download | linux-fsl-qoriq-60c4ba99e015afe879c2682967c8ca8d233f6d3c.tar.xz |
Hexagon: add support for new v4+ registers
Add support for a couple new v4+ registers, along with
newer save/restore pt_regs.
Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
Diffstat (limited to 'arch/hexagon/kernel/ptrace.c')
-rw-r--r-- | arch/hexagon/kernel/ptrace.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/hexagon/kernel/ptrace.c b/arch/hexagon/kernel/ptrace.c index 670b1b0..3982d9c 100644 --- a/arch/hexagon/kernel/ptrace.c +++ b/arch/hexagon/kernel/ptrace.c @@ -76,6 +76,10 @@ static int genregs_get(struct task_struct *target, dummy = pt_cause(regs); ONEXT(&dummy, cause); ONEXT(&pt_badva(regs), badva); +#if CONFIG_HEXAGON_ARCH_VERSION >=4 + ONEXT(®s->cs0, cs0); + ONEXT(®s->cs1, cs1); +#endif /* Pad the rest with zeros, if needed */ if (!ret) @@ -123,6 +127,11 @@ static int genregs_set(struct task_struct *target, INEXT(&bucket, cause); INEXT(&bucket, badva); +#if CONFIG_HEXAGON_ARCH_VERSION >=4 + INEXT(®s->cs0, cs0); + INEXT(®s->cs1, cs1); +#endif + /* Ignore the rest, if needed */ if (!ret) ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, |