m68knommu: make ColdFire watchdog register definitions absolute addresses

Make all definitions of the ColdFire Software watchdog registers absolute
addresses. Currently some are relative to the MBAR peripheral region.

The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.

This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

1 files changed, 4 insertions, 4 deletions

diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index 378a6d9..3983404 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -37,10 +37,10 @@
 #define	MCFSIM_PIWR		(MCF_MBAR + 0x38)	/* Intr Wakeup */
 #define	MCFSIM_PIVR		(MCF_MBAR + 0x3f)	/* Intr Vector */
 
-#define	MCFSIM_WRRR		0x280		/* Watchdog reference (r/w) */
-#define	MCFSIM_WIRR		0x284		/* Watchdog interrupt (r/w) */
-#define	MCFSIM_WCR		0x288		/* Watchdog counter (r/w) */
-#define	MCFSIM_WER		0x28c		/* Watchdog event (r/w) */
+#define	MCFSIM_WRRR		(MCF_MBAR + 0x280)	/* Watchdog reference */
+#define	MCFSIM_WIRR		(MCF_MBAR + 0x284)	/* Watchdog interrupt */
+#define	MCFSIM_WCR		(MCF_MBAR + 0x288)	/* Watchdog counter */
+#define	MCFSIM_WER		(MCF_MBAR + 0x28c)	/* Watchdog event */
 
 #define	MCFSIM_CSBR0		0x40		/* CS0 Base Address (r/w) */
 #define	MCFSIM_CSOR0		0x44		/* CS0 Option (r/w) */