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authorGreg Ungerer <gerg@uclinux.org>2009-05-22 03:33:35 (GMT)
committerGreg Ungerer <gerg@uclinux.org>2009-09-15 23:43:52 (GMT)
commit39f0fb6a3448cfc316e0d5295ed1b121db50037e (patch)
tree657db8073835e8d499708a898a36f1d3a1e39a32 /arch/m68knommu/platform/5249/config.c
parentf6a66276f5fdc018d2a9378c71de3bae13c588d7 (diff)
downloadlinux-fsl-qoriq-39f0fb6a3448cfc316e0d5295ed1b121db50037e.tar.xz
m68knommu: map ColdFire interrupts to correct masking bits
The older simple ColdFire interrupt controller has no one-to-one mapping of interrupt numbers to bits in the interrupt mask register. Create a mapping array that each ColdFire CPU type can populate with its available interrupts and the bits that each use in the interrupt mask register. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68knommu/platform/5249/config.c')
-rw-r--r--arch/m68knommu/platform/5249/config.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c
index 51202b1..646f5ba 100644
--- a/arch/m68knommu/platform/5249/config.c
+++ b/arch/m68knommu/platform/5249/config.c
@@ -48,11 +48,11 @@ static void __init m5249_uart_init_line(int line, int irq)
if (line == 0) {
writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
- mcf_clrimr(MCFINTC_UART0);
+ mcf_mapirq2imr(irq, MCFINTC_UART0);
} else if (line == 1) {
writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
- mcf_clrimr(MCFINTC_UART1);
+ mcf_mapirq2imr(irq, MCFINTC_UART1);
}
}
@@ -72,11 +72,13 @@ static void __init m5249_timers_init(void)
/* Timer1 is always used as system timer */
writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
MCF_MBAR + MCFSIM_TIMER1ICR);
+ mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
#ifdef CONFIG_HIGHPROFILE
/* Timer2 is to be used as a high speed profile timer */
writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
MCF_MBAR + MCFSIM_TIMER2ICR);
+ mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
#endif
}
@@ -97,13 +99,13 @@ void __init config_BSP(char *commandp, int size)
{
mach_reset = m5249_cpu_reset;
m5249_timers_init();
+ m5249_uarts_init();
}
/***************************************************************************/
static int __init init_BSP(void)
{
- m5249_uarts_init();
platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
return 0;
}