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authorGreg Ungerer <gerg@uclinux.org>2011-03-05 14:20:01 (GMT)
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 11:01:54 (GMT)
commita0ba4332a2cb110d6ef7695e64887396ab7d09d6 (patch)
tree5ee42d93979133ee6ba186c267d0e1dce53a8b62 /arch/m68knommu/platform
parent9a6b0c73afa702eee1803e664eae1b951faf895c (diff)
downloadlinux-fsl-qoriq-a0ba4332a2cb110d6ef7695e64887396ab7d09d6.tar.xz
m68knommu: remove use of MBAR value for ColdFire 528x peripheral addressing
The ColdFire 528x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68knommu/platform')
-rw-r--r--arch/m68knommu/platform/528x/config.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c
index 76b7433..ac39fc6 100644
--- a/arch/m68knommu/platform/528x/config.c
+++ b/arch/m68knommu/platform/528x/config.c
@@ -29,15 +29,15 @@
static struct mcf_platform_uart m528x_uart_platform[] = {
{
- .mapbase = MCF_MBAR + MCFUART_BASE1,
+ .mapbase = MCFUART_BASE1,
.irq = MCFINT_VECBASE + MCFINT_UART0,
},
{
- .mapbase = MCF_MBAR + MCFUART_BASE2,
+ .mapbase = MCFUART_BASE2,
.irq = MCFINT_VECBASE + MCFINT_UART0 + 1,
},
{
- .mapbase = MCF_MBAR + MCFUART_BASE3,
+ .mapbase = MCFUART_BASE3,
.irq = MCFINT_VECBASE + MCFINT_UART0 + 2,
},
{ },
@@ -51,8 +51,8 @@ static struct platform_device m528x_uart = {
static struct resource m528x_fec_resources[] = {
{
- .start = MCF_MBAR + 0x1000,
- .end = MCF_MBAR + 0x1000 + 0x7ff,
+ .start = MCFFEC_BASE,
+ .end = MCFFEC_BASE + MCFFEC_SIZE - 1,
.flags = IORESOURCE_MEM,
},
{
@@ -227,9 +227,9 @@ static void __init m528x_uart_init_line(int line, int irq)
/* make sure PUAPAR is set for UART0 and UART1 */
if (line < 2) {
- port = readb(MCF_MBAR + MCF5282_GPIO_PUAPAR);
+ port = readb(MCF5282_GPIO_PUAPAR);
port |= (0x03 << (line * 2));
- writeb(port, MCF_MBAR + MCF5282_GPIO_PUAPAR);
+ writeb(port, MCF5282_GPIO_PUAPAR);
}
}