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author | Michal Simek <monstr@monstr.eu> | 2010-02-08 15:41:38 (GMT) |
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committer | Michal Simek <monstr@monstr.eu> | 2012-03-23 08:28:19 (GMT) |
commit | e02db0aa3e1976ae4e23a66077d252a2f3ba74c7 (patch) | |
tree | ed16439c89abca6be4770f654c7c458ff0f6512f /arch/microblaze/include/asm/mmu.h | |
parent | 1451d1d88b9aa32ac9ee54180239e9b34b6f9e86 (diff) | |
download | linux-fsl-qoriq-e02db0aa3e1976ae4e23a66077d252a2f3ba74c7.tar.xz |
microblaze: Handle TLB skip size dynamically
This patch fix the problem with rootfs on JFFS2 with early printk
console turned on.
The origin version used TLB63 for temporary early printk mapping.
The code expect that kernel is not able to use all 64 TLB entries
till early printk console is remapped by ioremap. After that
temporary mapping on TLB63 is silently lost.
This expectation give the opportunity to have early console pretty
early.
Microblaze systems with JFFS2 rootfs with early printk console turned on
used more than 64 TLB entries before kernel can remap early console.
Based on that kernel does access to bad area because early printk mapping
is rewritten.
This patch introduces tlb_skip variable which dynamically stores number
of skipped TLB entries from the TLB0. skip_tlb=2 means that TLB0 and TLB1
should be skipped.
MICROBLAZE_TLB_SKIP defines how many TLB is skipped at the kernel start.
They can be used for user purpose.
TLB 63 is used for temporary LMB mapping (MICROBLAZE_LMB_TLB_ID).
Also clean TLBLO when kernel starts.
For specific kernel sizes kernel can use just one TLB. Detect this case
and use the second TLB for general purpose.
Change _tlbia function to flush TLB entries from tlb_skip to TLB_SIZE.
Export tlb_skip size through debugfs.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze/include/asm/mmu.h')
-rw-r--r-- | arch/microblaze/include/asm/mmu.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/arch/microblaze/include/asm/mmu.h b/arch/microblaze/include/asm/mmu.h index 5198de8..1f9eddd 100644 --- a/arch/microblaze/include/asm/mmu.h +++ b/arch/microblaze/include/asm/mmu.h @@ -56,6 +56,12 @@ typedef struct _SEGREG { extern void _tlbie(unsigned long va); /* invalidate a TLB entry */ extern void _tlbia(void); /* invalidate all TLB entries */ + +/* + * tlb_skip size stores actual number skipped TLBs from TLB0 - every directy TLB + * mapping has to increase tlb_skip size. + */ +extern u32 tlb_skip; # endif /* __ASSEMBLY__ */ /* @@ -68,7 +74,12 @@ extern void _tlbia(void); /* invalidate all TLB entries */ */ # define MICROBLAZE_TLB_SIZE 64 -# define MICROBLAZE_TLB_SKIP 2 + +/* For cases when you want to skip some TLB entries */ +# define MICROBLAZE_TLB_SKIP 0 + +/* Use the last TLB for temporary access to LMB */ +# define MICROBLAZE_LMB_TLB_ID 63 /* * TLB entries are defined by a "high" tag portion and a "low" data |