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authorTkhai Kirill <tkhai@yandex.ru>2012-01-10 13:17:03 (GMT)
committerDavid S. Miller <davem@davemloft.net>2012-01-11 00:28:24 (GMT)
commite51e07e0ac7e3ff847d640f41b7527db04d4a4e7 (patch)
tree1cd232b43e4b80f5e8881d802949a02a29b4ceda /arch/mips/alchemy/common/power.c
parent7b3480f8b701170c046e1ed362946f5f0d005e13 (diff)
downloadlinux-fsl-qoriq-e51e07e0ac7e3ff847d640f41b7527db04d4a4e7.tar.xz
sparc32: forced setting of mode of sun4m per-cpu timers
SUN4M per-cpu timers have two modes of work. These are timer mode and counter mode. Kernel doesn't write anything to the register, which is connected with mode choice. So, the mode is chosen by bootloader. This patch forces to use timer mode from the kernel and to be independent of bootloader. I had this problem with OpenBIOS. Timers don't tick and kernel fails on QEMU, when it's compiled with SMP support. The patch fixes problem. Signed-off-by: Tkhai Kirill <tkhai@yandex.ru> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/mips/alchemy/common/power.c')
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