diff options
| author | Gabor Juhos <juhosg@openwrt.org> | 2013-02-03 09:59:45 (GMT) |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2013-02-17 00:25:39 (GMT) |
| commit | 34b134aebda89888b6985b7a3139e9cbdf209236 (patch) | |
| tree | f6dc7a06f2b74420b77bac128a237af91ce00bbb /arch/mips/ath79 | |
| parent | 908339ef25b1d5e80f1c6fab22b9958174708b4a (diff) | |
| download | linux-fsl-qoriq-34b134aebda89888b6985b7a3139e9cbdf209236.tar.xz | |
MIPS: pci-ar724x: remove static PCI IO/MEM resources
Static resources become impractical when multiple
PCI controllers are present. Move the resources
into the platform device registration code and
change the probe routine to get those from there
platform device's resources.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4914/
Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/ath79')
| -rw-r--r-- | arch/mips/ath79/pci.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c index d90e071..45d1112 100644 --- a/arch/mips/ath79/pci.c +++ b/arch/mips/ath79/pci.c @@ -139,10 +139,13 @@ static struct platform_device * ath79_register_pci_ar724x(int id, unsigned long cfg_base, unsigned long ctrl_base, + unsigned long mem_base, + unsigned long mem_size, + unsigned long io_base, int irq) { struct platform_device *pdev; - struct resource res[3]; + struct resource res[5]; memset(res, 0, sizeof(res)); @@ -160,6 +163,16 @@ ath79_register_pci_ar724x(int id, res[2].start = irq; res[2].end = irq; + res[3].name = "mem_base"; + res[3].flags = IORESOURCE_MEM; + res[3].start = mem_base; + res[3].end = mem_base + mem_size - 1; + + res[4].name = "io_base"; + res[4].flags = IORESOURCE_IO; + res[4].start = io_base; + res[4].end = io_base; + pdev = platform_device_register_simple("ar724x-pci", id, res, ARRAY_SIZE(res)); return pdev; @@ -175,6 +188,9 @@ int __init ath79_register_pci(void) pdev = ath79_register_pci_ar724x(-1, AR724X_PCI_CFG_BASE, AR724X_PCI_CTRL_BASE, + AR724X_PCI_MEM_BASE, + AR724X_PCI_MEM_SIZE, + 0, ATH79_CPU_IRQ_IP2); } else if (soc_is_ar9342() || soc_is_ar9344()) { @@ -187,6 +203,9 @@ int __init ath79_register_pci(void) pdev = ath79_register_pci_ar724x(-1, AR724X_PCI_CFG_BASE, AR724X_PCI_CTRL_BASE, + AR724X_PCI_MEM_BASE, + AR724X_PCI_MEM_SIZE, + 0, ATH79_IP2_IRQ(0)); } else { /* No PCI support */ |