diff options
author | Florian Fainelli <florian@openwrt.org> | 2012-07-04 14:58:36 (GMT) |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2012-07-23 12:54:33 (GMT) |
commit | 39ca476e3439bb135ff37ed1310469735ade06bf (patch) | |
tree | 8d5e492772088bc4011893b96e4df34ce89c9a62 /arch/mips/bcm63xx/dev-spi.c | |
parent | 0f6db0d07289c9ebf46be8909afe2b3772e06015 (diff) | |
download | linux-fsl-qoriq-39ca476e3439bb135ff37ed1310469735ade06bf.tar.xz |
MIPS: BCM63xx: Add stub to register the SPI platform driver
This patch adds the necessary stub to register the SPI platform driver.
Since the registers are shuffled between the 4 BCM63xx CPUs supported by
this SPI driver we also need to generate the internal register layout and
export this layout for the driver to use it properly.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: grant.likely@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Patchwork: https://patchwork.linux-mips.org/patch/3321/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/bcm63xx/dev-spi.c')
-rw-r--r-- | arch/mips/bcm63xx/dev-spi.c | 119 |
1 files changed, 119 insertions, 0 deletions
diff --git a/arch/mips/bcm63xx/dev-spi.c b/arch/mips/bcm63xx/dev-spi.c new file mode 100644 index 0000000..67fa45b --- /dev/null +++ b/arch/mips/bcm63xx/dev-spi.c @@ -0,0 +1,119 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org> + * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com> + */ + +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/export.h> +#include <linux/platform_device.h> +#include <linux/err.h> +#include <linux/clk.h> + +#include <bcm63xx_cpu.h> +#include <bcm63xx_dev_spi.h> +#include <bcm63xx_regs.h> + +#ifdef BCMCPU_RUNTIME_DETECT +/* + * register offsets + */ +static const unsigned long bcm6338_regs_spi[] = { + __GEN_SPI_REGS_TABLE(6338) +}; + +static const unsigned long bcm6348_regs_spi[] = { + __GEN_SPI_REGS_TABLE(6348) +}; + +static const unsigned long bcm6358_regs_spi[] = { + __GEN_SPI_REGS_TABLE(6358) +}; + +static const unsigned long bcm6368_regs_spi[] = { + __GEN_SPI_REGS_TABLE(6368) +}; + +const unsigned long *bcm63xx_regs_spi; +EXPORT_SYMBOL(bcm63xx_regs_spi); + +static __init void bcm63xx_spi_regs_init(void) +{ + if (BCMCPU_IS_6338()) + bcm63xx_regs_spi = bcm6338_regs_spi; + if (BCMCPU_IS_6348()) + bcm63xx_regs_spi = bcm6348_regs_spi; + if (BCMCPU_IS_6358()) + bcm63xx_regs_spi = bcm6358_regs_spi; + if (BCMCPU_IS_6368()) + bcm63xx_regs_spi = bcm6368_regs_spi; +} +#else +static __init void bcm63xx_spi_regs_init(void) { } +#endif + +static struct resource spi_resources[] = { + { + .start = -1, /* filled at runtime */ + .end = -1, /* filled at runtime */ + .flags = IORESOURCE_MEM, + }, + { + .start = -1, /* filled at runtime */ + .flags = IORESOURCE_IRQ, + }, +}; + +static struct bcm63xx_spi_pdata spi_pdata = { + .bus_num = 0, + .num_chipselect = 8, +}; + +static struct platform_device bcm63xx_spi_device = { + .name = "bcm63xx-spi", + .id = -1, + .num_resources = ARRAY_SIZE(spi_resources), + .resource = spi_resources, + .dev = { + .platform_data = &spi_pdata, + }, +}; + +int __init bcm63xx_spi_register(void) +{ + struct clk *periph_clk; + + if (BCMCPU_IS_6345()) + return -ENODEV; + + periph_clk = clk_get(NULL, "periph"); + if (IS_ERR(periph_clk)) { + pr_err("unable to get periph clock\n"); + return -ENODEV; + } + + /* Set bus frequency */ + spi_pdata.speed_hz = clk_get_rate(periph_clk); + + spi_resources[0].start = bcm63xx_regset_address(RSET_SPI); + spi_resources[0].end = spi_resources[0].start; + spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI); + + if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) { + spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1; + spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE; + } + + if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) { + spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1; + spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE; + } + + bcm63xx_spi_regs_init(); + + return platform_device_register(&bcm63xx_spi_device); +} |