diff options
| author | Paul Gortmaker <paul.gortmaker@windriver.com> | 2013-06-18 17:01:10 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-07-01 13:10:53 (GMT) |
| commit | 169c3c164f0dd791dfa023ab02c12cb286a72e6e (patch) | |
| tree | ce6c3e9942658c8bd32d7a5c7b1ecc7a0543d64a /arch/mips/include/asm/mach-wrppmc/war.h | |
| parent | 5a772eee5544f4f84139868f7cd05806b805610d (diff) | |
| download | linux-fsl-qoriq-169c3c164f0dd791dfa023ab02c12cb286a72e6e.tar.xz | |
MIPS: Delete Wind River ppmc eval board support.
This board has been EOL for many years now; lets not burden people doing
build coverage and other tree wide work with working on essentially dead
files.
[ralf@linux-mips.org: Also remove arch/mips/include/asm/mach-wrppmc/war.h.]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Patchwork: http://patchwork.linux-mips.org/patch/5503/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-wrppmc/war.h')
| -rw-r--r-- | arch/mips/include/asm/mach-wrppmc/war.h | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/arch/mips/include/asm/mach-wrppmc/war.h b/arch/mips/include/asm/mach-wrppmc/war.h deleted file mode 100644 index e86084c..0000000 --- a/arch/mips/include/asm/mach-wrppmc/war.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> - */ -#ifndef __ASM_MIPS_MACH_WRPPMC_WAR_H -#define __ASM_MIPS_MACH_WRPPMC_WAR_H - -#define R4600_V1_INDEX_ICACHEOP_WAR 0 -#define R4600_V1_HIT_CACHEOP_WAR 0 -#define R4600_V2_HIT_CACHEOP_WAR 0 -#define R5432_CP0_INTERRUPT_WAR 0 -#define BCM1250_M3_WAR 0 -#define SIBYTE_1956_WAR 0 -#define MIPS4K_ICACHE_REFILL_WAR 0 -#define MIPS_CACHE_SYNC_WAR 0 -#define TX49XX_ICACHE_INDEX_INV_WAR 0 -#define ICACHE_REFILLS_WORKAROUND_WAR 1 -#define R10000_LLSC_WAR 0 -#define MIPS34K_MISSED_ITLB_WAR 0 - -#endif /* __ASM_MIPS_MACH_WRPPMC_WAR_H */ |