diff options
| author | Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> | 2013-03-25 17:09:02 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-09 15:55:18 (GMT) |
| commit | 102cedc32a6e3cd537374a3678d407591d5a6fab (patch) | |
| tree | 7a91493a82e65c0da845afb12020e1534d83ee5d /arch/mips/include | |
| parent | cf6d905828c2c75ebe8c818901e71e09ffe6f629 (diff) | |
| download | linux-fsl-qoriq-102cedc32a6e3cd537374a3678d407591d5a6fab.tar.xz | |
MIPS: microMIPS: Floating point support.
Add logic needed to do floating point emulation in microMIPS mode.
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Steven J. Hill <Steven. Hill@imgtec.com>
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/fpu_emulator.h | 6 | ||||
| -rw-r--r-- | arch/mips/include/asm/inst.h | 9 | ||||
| -rw-r--r-- | arch/mips/include/uapi/asm/inst.h | 5 |
3 files changed, 20 insertions, 0 deletions
diff --git a/arch/mips/include/asm/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h index 3b40927..2abb587 100644 --- a/arch/mips/include/asm/fpu_emulator.h +++ b/arch/mips/include/asm/fpu_emulator.h @@ -54,6 +54,12 @@ do { \ extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc); extern int do_dsemulret(struct pt_regs *xcp); +extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, + struct mips_fpu_struct *ctx, int has_fpu, + void *__user *fault_addr); +int process_fpemu_return(int sig, void __user *fault_addr); +int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, + unsigned long *contpc); /* * Instruction inserted following the badinst to further tag the sequence diff --git a/arch/mips/include/asm/inst.h b/arch/mips/include/asm/inst.h index f1eadf7..b27091e 100644 --- a/arch/mips/include/asm/inst.h +++ b/arch/mips/include/asm/inst.h @@ -73,4 +73,13 @@ typedef unsigned int mips_instruction; +/* microMIPS instruction decode structure. Do NOT export!!! */ +struct mm_decoded_insn { + mips_instruction insn; + mips_instruction next_insn; + int pc_inc; + int next_pc_inc; + int micro_mips_mode; +}; + #endif /* _ASM_INST_H */ diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h index 4715337..23ec2f5 100644 --- a/arch/mips/include/uapi/asm/inst.h +++ b/arch/mips/include/uapi/asm/inst.h @@ -424,6 +424,11 @@ enum mm_16d_minor_op { }; /* + * (microMIPS & MIPS16e) NOP instruction. + */ +#define MM_NOP16 0x0c00 + +/* * Damn ... bitfields depend from byteorder :-( */ #ifdef __MIPSEB__ |