diff options
| author | Jayachandran C <jchandra@broadcom.com> | 2013-06-11 14:41:35 (GMT) |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-06-13 15:46:43 (GMT) |
| commit | 7777b9395b77664cb736b941f95fb8f656edd111 (patch) | |
| tree | ab4cf1c71a9c8bf41bca5b289e9854a91a2909b6 /arch/mips/kernel | |
| parent | 8ecd08378c132536c7d47af225e09bd6f3a16779 (diff) | |
| download | linux-fsl-qoriq-7777b9395b77664cb736b941f95fb8f656edd111.tar.xz | |
MIPS: Allow platform specific scratch registers
XLR/XLP COP0 scratch is register 22, sel 0-7. Add a function
c0_kscratch() which returns the scratch register for the platform,
and use the return value while generating TLB handlers.
Setup kscratch_mask to 0xf for XLR/XLP since the config4 register
does not exist. This allows the kernel to allocate scratch registers
0-3 if needed.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5445/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index c6568bf..265c97d 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -959,6 +959,7 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu) set_isa(c, MIPS_CPU_ISA_M64R1); c->tlbsize = ((read_c0_config1() >> 25) & 0x3f) + 1; } + c->kscratch_mask = 0xf; } #ifdef CONFIG_64BIT |