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author | Ingo Molnar <mingo@elte.hu> | 2009-05-18 08:15:09 (GMT) |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-05-18 08:15:35 (GMT) |
commit | 1079cac0f4eb7d968395378b1625979d4c818dd6 (patch) | |
tree | d261058d95d27fe7250511d5fad69db30dc17731 /arch/mips/mm/sc-rm7k.c | |
parent | 5872144f64b34a5942f6b4acedc90b02de72c58b (diff) | |
parent | 1406de8e11eb043681297adf86d6892ff8efc27a (diff) | |
download | linux-fsl-qoriq-1079cac0f4eb7d968395378b1625979d4c818dd6.tar.xz |
Merge commit 'v2.6.30-rc6' into tracing/core
Merge reason: we were on an -rc4 base, sync up to -rc6
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/mm/sc-rm7k.c')
-rw-r--r-- | arch/mips/mm/sc-rm7k.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/mm/sc-rm7k.c b/arch/mips/mm/sc-rm7k.c index e3abfb2..de69bfb 100644 --- a/arch/mips/mm/sc-rm7k.c +++ b/arch/mips/mm/sc-rm7k.c @@ -29,7 +29,7 @@ extern unsigned long icache_way_size, dcache_way_size; #include <asm/r4kcache.h> -int rm7k_tcache_enabled; +static int rm7k_tcache_enabled; /* * Writeback and invalidate the primary cache dcache before DMA. @@ -121,7 +121,7 @@ static void rm7k_sc_disable(void) clear_c0_config(RM7K_CONF_SE); } -struct bcache_ops rm7k_sc_ops = { +static struct bcache_ops rm7k_sc_ops = { .bc_enable = rm7k_sc_enable, .bc_disable = rm7k_sc_disable, .bc_wback_inv = rm7k_sc_wback_inv, |