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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-07-10 17:10:02 (GMT) |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-07-10 17:10:02 (GMT) |
| commit | b247759642cc96a75122907cc898b4c43b4f86ce (patch) | |
| tree | 568e6ab08f2b986ff0b1ef80318c6c56c5d2ef42 /arch/parisc/include | |
| parent | 61e312914cc82c085c945f88e5a53d507dd7d0d4 (diff) | |
| parent | 5b879d78bc0818aa710f5d4d9abbfc2aca075cc3 (diff) | |
| download | linux-fsl-qoriq-b247759642cc96a75122907cc898b4c43b4f86ce.tar.xz | |
Merge branch 'parisc-for-3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc updates from Helge Deller:
"The PA-RISC updates for v3.11 include a gcc miscompilation fix,
gzip-compressed vmlinuz support, a fix in the PCI code for ATI FireGL
support on c8000 machines, a fix to prevent that %sr1 is being
clobbered and a few smaller optimizations and documentation updates"
* 'parisc-for-3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
parisc: Fix gcc miscompilation in pa_memcpy()
parisc: Ensure volatile space register %sr1 is not clobbered
parisc: optimize mtsp(0,sr) inline assembly
parisc: switch to gzip-compressed vmlinuz kernel
parisc: document the shadow registers
parisc: more capabilities info in /proc/cpuinfo
parisc: fix LMMIO mismatch between PAT length and MASK register
Diffstat (limited to 'arch/parisc/include')
| -rw-r--r-- | arch/parisc/include/asm/special_insns.h | 9 | ||||
| -rw-r--r-- | arch/parisc/include/asm/tlbflush.h | 5 |
2 files changed, 9 insertions, 5 deletions
diff --git a/arch/parisc/include/asm/special_insns.h b/arch/parisc/include/asm/special_insns.h index d306b75..e150930 100644 --- a/arch/parisc/include/asm/special_insns.h +++ b/arch/parisc/include/asm/special_insns.h @@ -32,9 +32,12 @@ static inline void set_eiem(unsigned long val) cr; \ }) -#define mtsp(gr, cr) \ - __asm__ __volatile__("mtsp %0,%1" \ +#define mtsp(val, cr) \ + { if (__builtin_constant_p(val) && ((val) == 0)) \ + __asm__ __volatile__("mtsp %%r0,%0" : : "i" (cr) : "memory"); \ + else \ + __asm__ __volatile__("mtsp %0,%1" \ : /* no outputs */ \ - : "r" (gr), "i" (cr) : "memory") + : "r" (val), "i" (cr) : "memory"); } #endif /* __PARISC_SPECIAL_INSNS_H */ diff --git a/arch/parisc/include/asm/tlbflush.h b/arch/parisc/include/asm/tlbflush.h index 5273da9..9d086a5 100644 --- a/arch/parisc/include/asm/tlbflush.h +++ b/arch/parisc/include/asm/tlbflush.h @@ -63,13 +63,14 @@ static inline void flush_tlb_mm(struct mm_struct *mm) static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) { - unsigned long flags; + unsigned long flags, sid; /* For one page, it's not worth testing the split_tlb variable */ mb(); - mtsp(vma->vm_mm->context,1); + sid = vma->vm_mm->context; purge_tlb_start(flags); + mtsp(sid, 1); pdtlb(addr); pitlb(addr); purge_tlb_end(flags); |