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authorJohn David Anglin <dave.anglin@bell.net>2013-05-20 16:42:53 (GMT)
committerHelge Deller <deller@gmx.de>2013-05-24 20:35:36 (GMT)
commitb63a2bbc0b9b106a93e11952ab057e2408f2eb02 (patch)
tree28dfb7722a7c974f9872a566905b441cf7f18190 /arch/parisc/include
parentd0c3be806a3fe7f4abdb0f7e7287addb55e73f35 (diff)
downloadlinux-fsl-qoriq-b63a2bbc0b9b106a93e11952ab057e2408f2eb02.tar.xz
parisc: make interrupt and interruption stack allocation reentrant
The get_stack_use_cr30 and get_stack_use_r30 macros allocate a stack frame for external interrupts and interruptions requiring a stack frame. They are currently not reentrant in that they save register context before the stack is set or adjusted. I have observed a number of system crashes where there was clear evidence of stack corruption during interrupt processing, and as a result register corruption. Some interruptions can still occur during interruption processing, however external interrupts are disabled and data TLB misses don't occur for absolute accesses. So, it's not entirely clear what triggers this issue. Also, if an interruption occurs when Q=0, it is generally not possible to recover as the shadowed registers are not copied. The attached patch reworks the get_stack_use_cr30 and get_stack_use_r30 macros to allocate stack before doing register saves. The new code is a couple of instructions shorter than the old implementation. Thus, it's an improvement even if it doesn't fully resolve the stack corruption issue. Based on limited testing, it improves SMP system stability. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
Diffstat (limited to 'arch/parisc/include')
-rw-r--r--arch/parisc/include/asm/assembly.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/parisc/include/asm/assembly.h b/arch/parisc/include/asm/assembly.h
index 89fb400..0da8482 100644
--- a/arch/parisc/include/asm/assembly.h
+++ b/arch/parisc/include/asm/assembly.h
@@ -438,7 +438,6 @@
SAVE_SP (%sr4, PT_SR4 (\regs))
SAVE_SP (%sr5, PT_SR5 (\regs))
SAVE_SP (%sr6, PT_SR6 (\regs))
- SAVE_SP (%sr7, PT_SR7 (\regs))
SAVE_CR (%cr17, PT_IASQ0(\regs))
mtctl %r0, %cr17