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author | James Bottomley <James.Bottomley@HansenPartnership.com> | 2010-12-22 16:22:11 (GMT) |
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committer | James Bottomley <James.Bottomley@suse.de> | 2011-01-15 14:44:40 (GMT) |
commit | f311847c2fcebd81912e2f0caf8a461dec28db41 (patch) | |
tree | 802ef2aa01bd0d662e60412366a40c827fd3e875 /arch/parisc/include | |
parent | 38567333a6dabd0f2b4150e9fb6dd8e3ba2985e5 (diff) | |
download | linux-fsl-qoriq-f311847c2fcebd81912e2f0caf8a461dec28db41.tar.xz |
parisc: flush pages through tmpalias space
The kernel has an 8M tmpailas space (originally designed for copying
and clearing pages but now only used for clearing). The idea is
to place zeros into the cache above a physical page rather than into
the physical page and flush the cache, because often the zeros end up
being replaced quickly anyway.
We can also use the tmpalias space for flushing a page. The difference
here is that we have to do tmpalias processing in the non access data and
instruction traps. The principle is the same: as long as we know the physical
address and have a virtual address congruent to the real one, the flush will
be effective.
In order to use the tmpalias space, the icache miss path has to be enhanced to
check for the alias region to make the fic instruction effective.
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'arch/parisc/include')
-rw-r--r-- | arch/parisc/include/asm/cacheflush.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h index f388a85..dc9286a 100644 --- a/arch/parisc/include/asm/cacheflush.h +++ b/arch/parisc/include/asm/cacheflush.h @@ -26,8 +26,6 @@ void flush_user_dcache_range_asm(unsigned long, unsigned long); void flush_kernel_dcache_range_asm(unsigned long, unsigned long); void flush_kernel_dcache_page_asm(void *); void flush_kernel_icache_page(void *); -void flush_user_dcache_page(unsigned long); -void flush_user_icache_page(unsigned long); void flush_user_dcache_range(unsigned long, unsigned long); void flush_user_icache_range(unsigned long, unsigned long); @@ -90,12 +88,15 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); +/* defined in pacache.S exported in cache.c used by flush_anon_page */ +void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr); + #define ARCH_HAS_FLUSH_ANON_PAGE static inline void flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) { if (PageAnon(page)) - flush_user_dcache_page(vmaddr); + flush_dcache_page_asm(page_to_phys(page), vmaddr); } #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE |