diff options
author | Kyle McMartin <kyle@mcmartin.ca> | 2008-05-15 14:53:57 (GMT) |
---|---|---|
committer | Kyle McMartin <kyle@mcmartin.ca> | 2008-05-15 15:03:43 (GMT) |
commit | 872f6debcae63309eb39bfc2cc9462fb83450ee0 (patch) | |
tree | 7a1bb365c00e791b8e3d8e848b6f0e97e9b3ab69 /arch/parisc/kernel/entry.S | |
parent | f54d8a1b3fef79bb1aa2f0840dd356ce7bb180f9 (diff) | |
download | linux-fsl-qoriq-872f6debcae63309eb39bfc2cc9462fb83450ee0.tar.xz |
parisc: use conditional macro for 64-bit wide ops
This work enables us to remove -traditional from $AFLAGS on
parisc.
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
Diffstat (limited to 'arch/parisc/kernel/entry.S')
-rw-r--r-- | arch/parisc/kernel/entry.S | 46 |
1 files changed, 19 insertions, 27 deletions
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index 1a3935e..5d08374 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S @@ -41,16 +41,8 @@ #include <linux/init.h> #ifdef CONFIG_64BIT -#define CMPIB cmpib,* -#define CMPB cmpb,* -#define COND(x) *x - .level 2.0w #else -#define CMPIB cmpib, -#define CMPB cmpb, -#define COND(x) x - .level 2.0 #endif @@ -958,9 +950,9 @@ intr_check_sig: * Only do signals if we are returning to user space */ LDREG PT_IASQ0(%r16), %r20 - CMPIB=,n 0,%r20,intr_restore /* backward */ + cmpib,COND(=),n 0,%r20,intr_restore /* backward */ LDREG PT_IASQ1(%r16), %r20 - CMPIB=,n 0,%r20,intr_restore /* backward */ + cmpib,COND(=),n 0,%r20,intr_restore /* backward */ copy %r0, %r25 /* long in_syscall = 0 */ #ifdef CONFIG_64BIT @@ -1014,10 +1006,10 @@ intr_do_resched: * we jump back to intr_restore. */ LDREG PT_IASQ0(%r16), %r20 - CMPIB= 0, %r20, intr_do_preempt + cmpib,COND(=) 0, %r20, intr_do_preempt nop LDREG PT_IASQ1(%r16), %r20 - CMPIB= 0, %r20, intr_do_preempt + cmpib,COND(=) 0, %r20, intr_do_preempt nop #ifdef CONFIG_64BIT @@ -1046,7 +1038,7 @@ intr_do_preempt: /* current_thread_info()->preempt_count */ mfctl %cr30, %r1 LDREG TI_PRE_COUNT(%r1), %r19 - CMPIB<> 0, %r19, intr_restore /* if preempt_count > 0 */ + cmpib,COND(<>) 0, %r19, intr_restore /* if preempt_count > 0 */ nop /* prev insn branched backwards */ /* check if we interrupted a critical path */ @@ -1065,7 +1057,7 @@ intr_do_preempt: */ intr_extint: - CMPIB=,n 0,%r16,1f + cmpib,COND(=),n 0,%r16,1f get_stack_use_cr30 b,n 2f @@ -1100,7 +1092,7 @@ ENDPROC(syscall_exit_rfi) ENTRY(intr_save) /* for os_hpmc */ mfsp %sr7,%r16 - CMPIB=,n 0,%r16,1f + cmpib,COND(=),n 0,%r16,1f get_stack_use_cr30 b 2f copy %r8,%r26 @@ -1122,7 +1114,7 @@ ENTRY(intr_save) /* for os_hpmc */ * adjust isr/ior below. */ - CMPIB=,n 6,%r26,skip_save_ior + cmpib,COND(=),n 6,%r26,skip_save_ior mfctl %cr20, %r16 /* isr */ @@ -1451,11 +1443,11 @@ nadtlb_emulate: bb,>=,n %r9,26,nadtlb_nullify /* m bit not set, just nullify */ BL get_register,%r25 extrw,u %r9,15,5,%r8 /* Get index register # */ - CMPIB=,n -1,%r1,nadtlb_fault /* have to use slow path */ + cmpib,COND(=),n -1,%r1,nadtlb_fault /* have to use slow path */ copy %r1,%r24 BL get_register,%r25 extrw,u %r9,10,5,%r8 /* Get base register # */ - CMPIB=,n -1,%r1,nadtlb_fault /* have to use slow path */ + cmpib,COND(=),n -1,%r1,nadtlb_fault /* have to use slow path */ BL set_register,%r25 add,l %r1,%r24,%r1 /* doesn't affect c/b bits */ @@ -1487,7 +1479,7 @@ nadtlb_probe_check: cmpb,<>,n %r16,%r17,nadtlb_fault /* Must be probe,[rw]*/ BL get_register,%r25 /* Find the target register */ extrw,u %r9,31,5,%r8 /* Get target register */ - CMPIB=,n -1,%r1,nadtlb_fault /* have to use slow path */ + cmpib,COND(=),n -1,%r1,nadtlb_fault /* have to use slow path */ BL set_register,%r25 copy %r0,%r1 /* Write zero to target register */ b nadtlb_nullify /* Nullify return insn */ @@ -1571,12 +1563,12 @@ dbit_trap_20w: L3_ptep ptp,pte,t0,va,dbit_fault #ifdef CONFIG_SMP - CMPIB=,n 0,spc,dbit_nolock_20w + cmpib,COND(=),n 0,spc,dbit_nolock_20w load32 PA(pa_dbit_lock),t0 dbit_spin_20w: LDCW 0(t0),t1 - cmpib,= 0,t1,dbit_spin_20w + cmpib,COND(=) 0,t1,dbit_spin_20w nop dbit_nolock_20w: @@ -1587,7 +1579,7 @@ dbit_nolock_20w: idtlbt pte,prot #ifdef CONFIG_SMP - CMPIB=,n 0,spc,dbit_nounlock_20w + cmpib,COND(=),n 0,spc,dbit_nounlock_20w ldi 1,t1 stw t1,0(t0) @@ -1607,7 +1599,7 @@ dbit_trap_11: L2_ptep ptp,pte,t0,va,dbit_fault #ifdef CONFIG_SMP - CMPIB=,n 0,spc,dbit_nolock_11 + cmpib,COND(=),n 0,spc,dbit_nolock_11 load32 PA(pa_dbit_lock),t0 dbit_spin_11: @@ -1629,7 +1621,7 @@ dbit_nolock_11: mtsp t1, %sr1 /* Restore sr1 */ #ifdef CONFIG_SMP - CMPIB=,n 0,spc,dbit_nounlock_11 + cmpib,COND(=),n 0,spc,dbit_nounlock_11 ldi 1,t1 stw t1,0(t0) @@ -1647,7 +1639,7 @@ dbit_trap_20: L2_ptep ptp,pte,t0,va,dbit_fault #ifdef CONFIG_SMP - CMPIB=,n 0,spc,dbit_nolock_20 + cmpib,COND(=),n 0,spc,dbit_nolock_20 load32 PA(pa_dbit_lock),t0 dbit_spin_20: @@ -1666,7 +1658,7 @@ dbit_nolock_20: idtlbt pte,prot #ifdef CONFIG_SMP - CMPIB=,n 0,spc,dbit_nounlock_20 + cmpib,COND(=),n 0,spc,dbit_nounlock_20 ldi 1,t1 stw t1,0(t0) @@ -1995,7 +1987,7 @@ ENTRY(syscall_exit) /* We can't use "CMPIB<> PER_HPUX" since "im5" field is sign extended */ ldo -PER_HPUX(%r19), %r19 - CMPIB<>,n 0,%r19,1f + cmpib,COND(<>),n 0,%r19,1f /* Save other hpux returns if personality is PER_HPUX */ STREG %r22,TASK_PT_GR22(%r1) |