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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-22 19:54:53 (GMT) |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-22 20:01:40 (GMT) |
| commit | ae19ffbadc1b2100285a5b5b3d0a4e0a11390904 (patch) | |
| tree | 3c2086ab67398a019089a47ca3f362a4bc6db74f /arch/powerpc/boot/dcr.h | |
| parent | 34e84f39a27d059a3e6ec6e8b94aafa702e6f220 (diff) | |
| parent | 9173a8ef24a6b1b8031507b35b8ffe5f85a87692 (diff) | |
| download | linux-fsl-qoriq-ae19ffbadc1b2100285a5b5b3d0a4e0a11390904.tar.xz | |
Merge branch 'master' into for-linus
Diffstat (limited to 'arch/powerpc/boot/dcr.h')
| -rw-r--r-- | arch/powerpc/boot/dcr.h | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h index 95b9f53..645a7c9 100644 --- a/arch/powerpc/boot/dcr.h +++ b/arch/powerpc/boot/dcr.h @@ -153,9 +153,7 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, #define DCRN_CPC0_PLLMR1 0xf4 #define DCRN_CPC0_UCR 0xf5 -/* 440GX Clock control etc */ - - +/* 440GX/405EX Clock Control reg */ #define DCRN_CPR0_CLKUPD 0x020 #define DCRN_CPR0_PLLC 0x040 #define DCRN_CPR0_PLLD 0x060 |