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author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2013-11-25 05:12:40 (GMT) |
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committer | Jose Rivera <German.Rivera@freescale.com> | 2014-03-12 01:48:05 (GMT) |
commit | 08e8996891cfef1dcde2291ed24d9616e82b9b78 (patch) | |
tree | a362f7233312ae1a8e759becaffb57a465a64142 /arch/powerpc/boot/dts/t2080qds.dts | |
parent | 7d411f14b1298eb87a243347367a733410f7790d (diff) | |
download | linux-fsl-qoriq-08e8996891cfef1dcde2291ed24d9616e82b9b78.tar.xz |
powerpc/t2080qds: add dpaa ethernet and rman nodes
- Add DPAA related nodes for ethernet on T2080QDS
- Add RMan node
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: I1f92de8d646b8ea08ddbb582660e7a14eba9af13
Reviewed-on: http://git.am.freescale.net:8181/9458
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Tested-by: Jose Rivera <German.Rivera@freescale.com>
Diffstat (limited to 'arch/powerpc/boot/dts/t2080qds.dts')
-rw-r--r-- | arch/powerpc/boot/dts/t2080qds.dts | 158 |
1 files changed, 158 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/t2080qds.dts b/arch/powerpc/boot/dts/t2080qds.dts index aa1d6d8..7241772 100644 --- a/arch/powerpc/boot/dts/t2080qds.dts +++ b/arch/powerpc/boot/dts/t2080qds.dts @@ -42,6 +42,12 @@ #size-cells = <2>; interrupt-parent = <&mpic>; + aliases { + emi1_slot1 = &t2080mdio2; + emi1_slot2 = &t2080mdio3; + emi1_slot3 = &t2080mdio4; + }; + rio: rapidio@ffe0c0000 { reg = <0xf 0xfe0c0000 0 0x11000>; @@ -54,4 +60,156 @@ }; }; +&soc { + fman0: fman@400000 { + fm1mac1: ethernet@e0000 { /* DTSEC1/10GEC3 */ + phy-handle = <&phy_sgmii_s3_1e>; + phy-connection-type = "xgmii"; + }; + + fm1mac2: ethernet@e2000 { /* DTSEC2/10GEC4 */ + phy-handle = <&phy_sgmii_s3_1d>; + phy-connection-type = "xgmii"; + }; + + fm1mac3: ethernet@e4000 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii"; + }; + + fm1mac4: ethernet@e6000 { + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii"; + }; + + fm1mac5: ethernet@e8000 { + phy-handle = <&phy_sgmii_s2_1e>; + phy-connection-type = "sgmii"; + }; + + fm1mac6: ethernet@ea000 { + phy-handle = <&phy_sgmii_s2_1d>; + phy-connection-type = "sgmii"; + }; + + fm1mac9: ethernet@f0000 { /* DTSEC9/10GEC1 */ + phy-handle = <&phy_xaui_slot3>; + phy-connection-type = "xgmii"; + }; + + fm1mac10: ethernet@f2000 { /* DTSEC10/10GEC2 */ + phy-handle = <&phy_sgmii_s3_1f>; + phy-connection-type = "xgmii"; + }; + + mdio0: mdio@fc000 { + }; + + xmdio0: mdio@fd000 { + phy_xaui_slot3: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x3>; + }; + }; + }; +}; + +&boardctrl { + mdio-mux-emi1 { + compatible = "mdio-mux-mmioreg", "mdio-mux"; + mdio-parent-bus = <&mdio0>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x54 1>; /* BRDCFG4 */ + mux-mask = <0xe0>; /* EMI1 */ + + /* On-board RGMII1 PHY */ + t2080mdio0: mdio@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + rgmii_phy1: ethernet-phy@1 { /* MAC3 */ + reg = <0x1>; + }; + }; + + /* On-board RGMII2 PHY */ + t2080mdio1: mdio@20 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + rgmii_phy2: ethernet-phy@2 { /* MAC4 */ + reg = <0x2>; + }; + }; + + /* Slot 1 */ + t2080mdio2: mdio@40 { + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + phy_sgmii_s1_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_s1_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_s1_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_s1_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + + /* Slot 2 */ + t2080mdio3: mdio@c0 { + reg = <0xc0>; + #address-cells = <1>; + #size-cells = <0>; + /*status = "disabled";*/ + + phy_sgmii_s2_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_s2_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_s2_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_s2_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + + /* Slot 3 */ + t2080mdio4: mdio@60 { + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + phy_sgmii_s3_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_s3_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_s3_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_s3_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + }; +}; + /include/ "fsl/t2080si-post.dtsi" +/include/ "fsl/qoriq-dpaa-res3.dtsi" +/include/ "fsl/qoriq-qman-ceetm0.dtsi" |