diff options
author | Paul Mackerras <paulus@samba.org> | 2009-04-07 02:54:08 (GMT) |
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committer | Paul Mackerras <paulus@samba.org> | 2009-04-07 02:54:08 (GMT) |
commit | ae6e59caefd8d4097ccb096c95df95ec7e52fe88 (patch) | |
tree | f72b77d41c9f5a3b18fb52e505d60dba2ad913a5 /arch/powerpc/boot/dts | |
parent | 0221c81b1b8eb0cbb6b30a0ced52ead32d2b4e4c (diff) | |
parent | f379188958ae8af30105eb1f27d0e0abf6a51558 (diff) | |
download | linux-fsl-qoriq-ae6e59caefd8d4097ccb096c95df95ec7e52fe88.tar.xz |
Merge branch 'next' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into merge
Diffstat (limited to 'arch/powerpc/boot/dts')
-rw-r--r-- | arch/powerpc/boot/dts/ksi8560.dts | 4 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/pq2fads.dts | 20 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/sbc8548.dts | 4 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/sbc8560.dts | 4 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/socrates.dts | 1 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/stx_gp3_8560.dts | 4 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/tqm8540.dts | 4 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/tqm8541.dts | 4 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/tqm8555.dts | 4 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/tqm8560.dts | 4 |
10 files changed, 31 insertions, 22 deletions
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts index 308fe7c..c9cfd37 100644 --- a/arch/powerpc/boot/dts/ksi8560.dts +++ b/arch/powerpc/boot/dts/ksi8560.dts @@ -57,14 +57,14 @@ bus-frequency = <0>; /* Fixed by bootwrapper */ memory-controller@2000 { - compatible = "fsl,8540-memory-controller"; + compatible = "fsl,mpc8540-memory-controller"; reg = <0x2000 0x1000>; interrupt-parent = <&mpic>; interrupts = <0x12 0x2>; }; L2: l2-cache-controller@20000 { - compatible = "fsl,8540-l2-cache-controller"; + compatible = "fsl,mpc8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <0x20>; /* 32 bytes */ cache-size = <0x40000>; /* L2, 256K */ diff --git a/arch/powerpc/boot/dts/pq2fads.dts b/arch/powerpc/boot/dts/pq2fads.dts index b2d6109..0bb6693 100644 --- a/arch/powerpc/boot/dts/pq2fads.dts +++ b/arch/powerpc/boot/dts/pq2fads.dts @@ -17,6 +17,14 @@ #address-cells = <1>; #size-cells = <1>; + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -45,7 +53,7 @@ #size-cells = <1>; reg = <0xf0010100 0x60>; - ranges = <0x0 0x0 0xfe000000 0x800000 + ranges = <0x0 0x0 0xff800000 0x800000 0x1 0x0 0xf4500000 0x8000 0x8 0x0 0xf8200000 0x8000>; @@ -71,7 +79,7 @@ }; }; - pci@f0010800 { + pci0: pci@f0010800 { device_type = "pci"; reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>; compatible = "fsl,mpc8280-pci", "fsl,pq2-pci"; @@ -142,7 +150,7 @@ reg = <0x119f0 0x10 0x115f0 0x10>; }; - serial@11a00 { + serial0: serial@11a00 { device_type = "serial"; compatible = "fsl,mpc8280-scc-uart", "fsl,cpm2-scc-uart"; @@ -153,7 +161,7 @@ fsl,cpm-command = <0x800000>; }; - serial@11a20 { + serial1: serial@11a20 { device_type = "serial"; compatible = "fsl,mpc8280-scc-uart", "fsl,cpm2-scc-uart"; @@ -164,7 +172,7 @@ fsl,cpm-command = <0x4a00000>; }; - ethernet@11320 { + enet0: ethernet@11320 { device_type = "network"; compatible = "fsl,mpc8280-fcc-enet", "fsl,cpm2-fcc-enet"; @@ -176,7 +184,7 @@ fsl,cpm-command = <0x16200300>; }; - ethernet@11340 { + enet1: ethernet@11340 { device_type = "network"; compatible = "fsl,mpc8280-fcc-enet", "fsl,cpm2-fcc-enet"; diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts index 9c5079f..b1f1416 100644 --- a/arch/powerpc/boot/dts/sbc8548.dts +++ b/arch/powerpc/boot/dts/sbc8548.dts @@ -156,14 +156,14 @@ compatible = "simple-bus"; memory-controller@2000 { - compatible = "fsl,8548-memory-controller"; + compatible = "fsl,mpc8548-memory-controller"; reg = <0x2000 0x1000>; interrupt-parent = <&mpic>; interrupts = <0x12 0x2>; }; L2: l2-cache-controller@20000 { - compatible = "fsl,8548-l2-cache-controller"; + compatible = "fsl,mpc8548-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <0x20>; // 32 bytes cache-size = <0x80000>; // L2, 512K diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts index b772405..c4564b8 100644 --- a/arch/powerpc/boot/dts/sbc8560.dts +++ b/arch/powerpc/boot/dts/sbc8560.dts @@ -61,14 +61,14 @@ clock-frequency = <0>; memory-controller@2000 { - compatible = "fsl,8560-memory-controller"; + compatible = "fsl,mpc8560-memory-controller"; reg = <0x2000 0x1000>; interrupt-parent = <&mpic>; interrupts = <0x12 0x2>; }; L2: l2-cache-controller@20000 { - compatible = "fsl,8560-l2-cache-controller"; + compatible = "fsl,mpc8560-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <0x20>; // 32 bytes cache-size = <0x40000>; // L2, 256K diff --git a/arch/powerpc/boot/dts/socrates.dts b/arch/powerpc/boot/dts/socrates.dts index b8d0fc6..04c3988 100644 --- a/arch/powerpc/boot/dts/socrates.dts +++ b/arch/powerpc/boot/dts/socrates.dts @@ -52,6 +52,7 @@ soc8544@e0000000 { #address-cells = <1>; #size-cells = <1>; + device_type = "soc"; ranges = <0x00000000 0xe0000000 0x00100000>; reg = <0xe0000000 0x00001000>; // CCSRBAR 1M diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts index 8b17395..ea6b151 100644 --- a/arch/powerpc/boot/dts/stx_gp3_8560.dts +++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts @@ -57,14 +57,14 @@ compatible = "fsl,mpc8560-immr", "simple-bus"; memory-controller@2000 { - compatible = "fsl,8540-memory-controller"; + compatible = "fsl,mpc8540-memory-controller"; reg = <0x2000 0x1000>; interrupt-parent = <&mpic>; interrupts = <18 2>; }; L2: l2-cache-controller@20000 { - compatible = "fsl,8540-l2-cache-controller"; + compatible = "fsl,mpc8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; cache-size = <0x40000>; // L2, 256K diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts index ac9413a..231bae7 100644 --- a/arch/powerpc/boot/dts/tqm8540.dts +++ b/arch/powerpc/boot/dts/tqm8540.dts @@ -59,14 +59,14 @@ compatible = "fsl,mpc8540-immr", "simple-bus"; memory-controller@2000 { - compatible = "fsl,8540-memory-controller"; + compatible = "fsl,mpc8540-memory-controller"; reg = <0x2000 0x1000>; interrupt-parent = <&mpic>; interrupts = <18 2>; }; L2: l2-cache-controller@20000 { - compatible = "fsl,8540-l2-cache-controller"; + compatible = "fsl,mpc8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; cache-size = <0x40000>; // L2, 256K diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts index c71bb5d..4356a1f 100644 --- a/arch/powerpc/boot/dts/tqm8541.dts +++ b/arch/powerpc/boot/dts/tqm8541.dts @@ -58,14 +58,14 @@ compatible = "fsl,mpc8541-immr", "simple-bus"; memory-controller@2000 { - compatible = "fsl,8540-memory-controller"; + compatible = "fsl,mpc8540-memory-controller"; reg = <0x2000 0x1000>; interrupt-parent = <&mpic>; interrupts = <18 2>; }; L2: l2-cache-controller@20000 { - compatible = "fsl,8540-l2-cache-controller"; + compatible = "fsl,mpc8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; cache-size = <0x40000>; // L2, 256K diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts index a133ded..06d366e 100644 --- a/arch/powerpc/boot/dts/tqm8555.dts +++ b/arch/powerpc/boot/dts/tqm8555.dts @@ -58,14 +58,14 @@ compatible = "fsl,mpc8555-immr", "simple-bus"; memory-controller@2000 { - compatible = "fsl,8540-memory-controller"; + compatible = "fsl,mpc8540-memory-controller"; reg = <0x2000 0x1000>; interrupt-parent = <&mpic>; interrupts = <18 2>; }; L2: l2-cache-controller@20000 { - compatible = "fsl,8540-l2-cache-controller"; + compatible = "fsl,mpc8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; cache-size = <0x40000>; // L2, 256K diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts index 649e2e5..feff915 100644 --- a/arch/powerpc/boot/dts/tqm8560.dts +++ b/arch/powerpc/boot/dts/tqm8560.dts @@ -60,14 +60,14 @@ compatible = "fsl,mpc8560-immr", "simple-bus"; memory-controller@2000 { - compatible = "fsl,8540-memory-controller"; + compatible = "fsl,mpc8540-memory-controller"; reg = <0x2000 0x1000>; interrupt-parent = <&mpic>; interrupts = <18 2>; }; L2: l2-cache-controller@20000 { - compatible = "fsl,8540-l2-cache-controller"; + compatible = "fsl,mpc8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; cache-size = <0x40000>; // L2, 256K |