diff options
| author | Zhao Qiang <B45475@freescale.com> | 2014-09-17 08:00:27 (GMT) |
|---|---|---|
| committer | Richard Schmitt <richard.schmitt@freescale.com> | 2014-09-17 19:07:31 (GMT) |
| commit | 785192cb4049aa9cd8d23049013bb99e58a00f38 (patch) | |
| tree | 3816b4da262938493c67bc3b69a52b453fe220b3 /arch/powerpc/boot | |
| parent | 886460bb9fb26a737444eeffc0f85eb1c5c7eed5 (diff) | |
| download | linux-fsl-qoriq-785192cb4049aa9cd8d23049013bb99e58a00f38.tar.xz | |
qe-hdlc: qe-hdlc work in normal mode instead of internal-loopback mode
qe-hdlc worked in internal-loopback without TDMR ds26522,
now it can work with TDMR ds26522 in normal mode,
so modify it to normal mode.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Change-Id: I7eeb4ec196d74cb53f3bffced0889637c72ed5d6
Reviewed-on: http://git.am.freescale.net:8181/19008
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
Diffstat (limited to 'arch/powerpc/boot')
| -rw-r--r-- | arch/powerpc/boot/dts/t1040rdb.dts | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/powerpc/boot/dts/t1040rdb.dts b/arch/powerpc/boot/dts/t1040rdb.dts index 5695fbc..6e085a8 100644 --- a/arch/powerpc/boot/dts/t1040rdb.dts +++ b/arch/powerpc/boot/dts/t1040rdb.dts @@ -405,17 +405,17 @@ ucc@2200 { compatible = "fsl,ucc_hdlc"; - rx-clock-name = "brg2"; - tx-clock-name = "brg2"; - fsl,rx-sync-clock = "none"; - fsl,tx-sync-clock = "none"; + rx-clock-name = "clk10"; + tx-clock-name = "clk11"; + fsl,rx-sync-clock = "rsync_pin"; + fsl,tx-sync-clock = "tsync_pin"; fsl,tx-timeslot = <0xfffffffe>; fsl,rx-timeslot = <0xfffffffe>; fsl,tdm-framer-type = "e1"; fsl,tdm-mode = "normal"; fsl,tdm-id = <1>; fsl,siram-entry-id = <2>; - fsl,inter-loopback; + fsl,tdm-interface; }; }; }; |