diff options
author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2014-02-21 02:18:02 (GMT) |
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committer | Jose Rivera <German.Rivera@freescale.com> | 2014-03-12 01:48:24 (GMT) |
commit | aefdb58080c6a586068151bfca8cd63047874442 (patch) | |
tree | fc463b632120d7b9c2e10d23eb05d130b9a5c6f7 /arch/powerpc/boot | |
parent | 08e8996891cfef1dcde2291ed24d9616e82b9b78 (diff) | |
download | linux-fsl-qoriq-aefdb58080c6a586068151bfca8cd63047874442.tar.xz |
powerpc/t2081qds: Add ethernet support
Add T2081QDS Ethernet configuration to support RGMII, SGMII, XFI.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: I347a2e000d0ed616e33fdb96bfbda8f6c25b6d3b
Reviewed-on: http://git.am.freescale.net:8181/8971
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/9460
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r-- | arch/powerpc/boot/dts/t2081qds.dts | 215 |
1 files changed, 215 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/t2081qds.dts b/arch/powerpc/boot/dts/t2081qds.dts index 8ec80a7..1dac1de 100644 --- a/arch/powerpc/boot/dts/t2081qds.dts +++ b/arch/powerpc/boot/dts/t2081qds.dts @@ -41,6 +41,221 @@ #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; + + aliases { + emi1_slot1 = &t2081mdio2; + emi1_slot2 = &t2081mdio3; + emi1_slot3 = &t2081mdio4; + emi1_slot5 = &t2081mdio5; + emi1_slot6 = &t2081mdio6; + emi1_slot7 = &t2081mdio7; + }; +}; + +&soc { + fman0: fman@400000 { + fm1mac1: ethernet@e0000 { /* DTSEC1 */ + phy-handle = <&phy_sgmii_s7_1c>; + phy-connection-type = "sgmii"; + }; + + fm1mac2: ethernet@e2000 { /* DTSEC2 */ + phy-handle = <&phy_sgmii_s7_1d>; + phy-connection-type = "sgmii"; + }; + + fm1mac3: ethernet@e4000 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii"; + }; + + fm1mac4: ethernet@e6000 { + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii"; + }; + + fm1mac5: ethernet@e8000 { + phy-handle = <&phy_sgmii_s3_1c>; + phy-connection-type = "sgmii"; + }; + + fm1mac6: ethernet@ea000 { + phy-handle = <&phy_sgmii_s7_1f>; + phy-connection-type = "sgmii"; + }; + + fm1mac9: ethernet@f0000 { /* DTSEC9/10GEC1 */ + phy-handle = <&phy_sgmii_s2_1c>; + phy-connection-type = "xgmii"; + }; + + fm1mac10: ethernet@f2000 { /* DTSEC10/10GEC2 */ + phy-handle = <&phy_sgmii_s7_1e>; + phy-connection-type = "xgmii"; + }; + + mdio0: mdio@fc000 { + }; + + xmdio0: mdio@fd000 { + }; + }; +}; + +&boardctrl { + mdio-mux-emi1 { + compatible = "mdio-mux-mmioreg", "mdio-mux"; + mdio-parent-bus = <&mdio0>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x54 1>; /* BRDCFG4 */ + mux-mask = <0xe0>; /* EMI1 */ + + /* On-board RGMII1 PHY */ + t2081mdio0: mdio@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + rgmii_phy1: ethernet-phy@1 { + reg = <0x1>; + }; + }; + + /* On-board RGMII2 PHY */ + t2081mdio1: mdio@20 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + rgmii_phy2: ethernet-phy@2 { + reg = <0x2>; + }; + }; + + /* Slot 1 */ + t2081mdio2: mdio@40 { + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + + phy_sgmii_s1_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_s1_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_s1_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_s1_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + + /* Slot 2 */ + t2081mdio3: mdio@60 { + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + phy_sgmii_s2_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_s2_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_s2_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_s2_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + + /* Slot 3 */ + t2081mdio4: mdio@80 { + reg = <0x80>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + phy_sgmii_s3_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_s3_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_s3_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_s3_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + + /* Slot 5 */ + t2081mdio5: mdio@a0 { + reg = <0xa0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + phy_sgmii_s5_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_s5_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_s5_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_s5_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + + /* Slot 6 */ + t2081mdio6: mdio@c0 { + reg = <0xc0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + phy_sgmii_s6_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_s6_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_s6_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_s6_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + + /* Slot 7 */ + t2081mdio7: mdio@e0 { + reg = <0xe0>; + #address-cells = <1>; + #size-cells = <0>; + + phy_sgmii_s7_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_s7_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_s7_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_s7_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + }; }; /include/ "fsl/t2081si-post.dtsi" |