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authorPriyanka Jain <Priyanka.Jain@freescale.com>2014-07-30 06:37:28 (GMT)
committerRichard Schmitt <richard.schmitt@freescale.com>2014-08-06 21:02:15 (GMT)
commit69b25ca243552469a6cea66a97708020b3ec56ab (patch)
tree798f9ea539fdb56b7d4e25f41b761ec449dcecba /arch/powerpc/include/asm/reg.h
parent1426444953d06d19eb5cd06d40cc82ba1ce7979a (diff)
downloadlinux-fsl-qoriq-69b25ca243552469a6cea66a97708020b3ec56ab.tar.xz
Revert "powerpc: Enable erratum A-008007 workaorund for T1040 Rev1.0"
This reverts commit 062853ac8f4b6fb5fee1770b67d4684023929e10. New PBI-based workaround which resets PVR register for erratum A-008007 is implemented in RCW. So no workaround implementation is required in Linux Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Change-Id: I6d952796efda066fd648179dd9508a0f8c4c2ba2 Reviewed-on: http://git.am.freescale.net:8181/15311 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Tested-by: Richard Schmitt <richard.schmitt@freescale.com> Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm/reg.h')
-rw-r--r--arch/powerpc/include/asm/reg.h14
1 files changed, 0 insertions, 14 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 977cba5..5402fb1 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -1070,8 +1070,6 @@
#define PVR_VER_E500V1 0x8020
#define PVR_VER_E500V2 0x8021
#define PVR_VER_E6500 0x8040
-#define PVR_VER_E5500 0x8024
-#define PVR_VER_E5500_REV_1020 0x1020
/*
* For the 8xx processors, all of them report the same PVR family for
@@ -1129,21 +1127,9 @@
: "memory")
#endif
-#ifdef CONFIG_FSL_ERRATUM_A_008007 /*PVR value for e5501 is unreliable*/
-#define mfspr(rn) ({unsigned long rval; \
- if (rn == SPRN_PVR) {\
- rval = (PVR_VER_E5500 << 16) | \
- PVR_VER_E5500_REV_1020; \
- } else {\
- asm volatile("mfspr %0," __stringify(rn) \
- : "=r" (rval)); \
- } \
- rval; })
-#else
#define mfspr(rn) ({unsigned long rval; \
asm volatile("mfspr %0," __stringify(rn) \
: "=r" (rval)); rval;})
-#endif
#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : \
: "r" ((unsigned long)(v)) \
: "memory")