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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-07-15 03:03:11 (GMT)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-08-14 04:58:08 (GMT)
commit3fafe9c202321a3edc47386d2071af89555c9f45 (patch)
tree7a809f8ab83049c69468e4c0a64f1ef977934d6a /arch/powerpc/include/asm
parentb37193b71846858d816e152d3a5db010d7b73f5e (diff)
downloadlinux-fsl-qoriq-3fafe9c202321a3edc47386d2071af89555c9f45.tar.xz
powerpc/powernv: Add PIO accessors for Power8 LPC bus
This uses the hooks provided by CONFIG_PPC_INDIRECT_PIO to implement a set of hooks for IO port access to use the LPC bus via OPAL calls for the first 64K of IO space Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm')
-rw-r--r--arch/powerpc/include/asm/io.h8
-rw-r--r--arch/powerpc/include/asm/opal.h2
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 6cc61a3..5a64757 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -69,6 +69,14 @@ extern unsigned long pci_dram_offset;
extern resource_size_t isa_mem_base;
+/* Boolean set by platform if PIO accesses are suppored while _IO_BASE
+ * is not set or addresses cannot be translated to MMIO. This is typically
+ * set when the platform supports "special" PIO accesses via a non memory
+ * mapped mechanism, and allows things like the early udbg UART code to
+ * function.
+ */
+extern bool isa_io_special;
+
#ifdef CONFIG_PPC32
#if defined(CONFIG_PPC_INDIRECT_PIO) || defined(CONFIG_PPC_INDIRECT_MMIO)
#error CONFIG_PPC_INDIRECT_{PIO,MMIO} are not yet supported on 32 bits
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index c701e2b..48ad678 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -687,6 +687,8 @@ extern int opal_machine_check(struct pt_regs *regs);
extern void opal_shutdown(void);
+extern void opal_lpc_init(void);
+
#endif /* __ASSEMBLY__ */
#endif /* __OPAL_H */